From: Krzysztof Adamski <krzysztof.adamski@sonymobile.com>
Cc: Linus Walleij <linus.walleij@linaro.org>,
Maxime Ripard <maxime.ripard@free-electrons.com>,
Chen-Yu Tsai <wens@csie.org>, Hans de Goede <hdegoede@redhat.com>,
Hongzhou Yang <hongzhou.yang@mediatek.com>,
Rob Herring <robh@kernel.org>, Jens Kuske <jenskuske@gmail.com>,
Fabian Frederick <fabf@skynet.be>,
Krzysztof Adamski <krzysztof.adamski@sonymobile.com>,
Vishnu Patekar <vishnupatekar0510@gmail.com>,
linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH] pinctrl: sunxi: H3 requires irq_read_needs_mux
Date: Tue, 2 Feb 2016 11:03:03 +0100 [thread overview]
Message-ID: <20160202100217.GA7483@box2.japko.eu> (raw)
It seems that on H3, just like on A10, when GPIOs are configured as
external interrupt data registers does not contain their value. When
value is read, GPIO function must be temporary switched to input for
reads.
Signed-off-by: Krzysztof Adamski <k@japko.eu>
---
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
index 77d4cf0..11760bb 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
@@ -492,6 +492,7 @@ static const struct sunxi_pinctrl_desc sun8i_h3_pinctrl_data = {
.pins = sun8i_h3_pins,
.npins = ARRAY_SIZE(sun8i_h3_pins),
.irq_banks = 2,
+ .irq_read_needs_mux = true
};
static int sun8i_h3_pinctrl_probe(struct platform_device *pdev)
--
2.4.2
next reply other threads:[~2016-02-02 10:06 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-02 10:03 Krzysztof Adamski [this message]
2016-02-02 13:24 ` [PATCH] pinctrl: sunxi: H3 requires irq_read_needs_mux Maxime Ripard
2016-02-11 12:01 ` Linus Walleij
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