From: Mika Westerberg <mika.westerberg@intel.com>
To: Qipeng Zha <qipeng.zha@intel.com>
Cc: linux-gpio@vger.kernel.org, linus.walleij@linaro.org,
Qi Zheng <qi.zheng@intel.com>
Subject: Re: [PATCH 2/3] pinctrl:Intel: clear interrupt status for every IRQ setup
Date: Fri, 11 Mar 2016 11:45:17 +0200 [thread overview]
Message-ID: <20160311094517.GO1796@lahna.fi.intel.com> (raw)
In-Reply-To: <1457715962-108484-2-git-send-email-qipeng.zha@intel.com>
On Sat, Mar 12, 2016 at 01:06:01AM +0800, Qipeng Zha wrote:
> There is one unexpected GPIO interrupt coming in below scenario.
> 1. GPIO X is going to be used as falling edge interrupt.
> 2. Before request_irq call, this GPIO X interrupt was masked.
> 3. But the IRQ mode may be set for some mode in default (by BIOS).
> 4. Toggle GPIO X from high to low.
> 5. The GPIO X interrupt status will be set even if it was masked.
> 6. Register the interrupt for GPIO X, the interrupt will be unmasked.
> 7. Even if no change on GPIO X afterwards, but one GPIO X interrupt
> will be triggered because the interrupt status was set.
>
> To avoid above issue, the interrupt status need clear before request_irq.
>
> Signed-off-by: Qi Zheng <qi.zheng@intel.com>
> Signed-off-by: Qipeng Zha <qipeng.zha@intel.com>
> ---
> drivers/pinctrl/intel/pinctrl-intel.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
> index ded5378..d6fe659 100644
> --- a/drivers/pinctrl/intel/pinctrl-intel.c
> +++ b/drivers/pinctrl/intel/pinctrl-intel.c
> @@ -773,6 +773,8 @@ static int intel_gpio_irq_type(struct irq_data *d, unsigned type)
> return -EPERM;
> }
>
> + intel_gpio_irq_ack(d);
If the pin toggles right here, we still have the same issue, no?
We should check in the interrupt handler whether the interrupt is
actually enabled which I think we do already. Maybe that code has bug
somewhere?
> +
> spin_lock_irqsave(&pctrl->lock, flags);
>
> value = readl(reg);
> --
> 1.8.3.2
next prev parent reply other threads:[~2016-03-11 9:45 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-11 17:06 [PATCH 1/3] pinctrl: Intel: add RX invertion config Qipeng Zha
2016-03-11 9:38 ` Mika Westerberg
2016-03-14 1:10 ` Zheng, Qi
2016-03-14 8:50 ` Westerberg, Mika
2016-03-14 8:56 ` Zheng, Qi
2016-03-14 12:26 ` Linus Walleij
2016-03-15 2:17 ` Zheng, Qi
2016-03-16 12:27 ` Linus Walleij
2016-03-16 13:34 ` Daniel Vetter
[not found] ` <20160316133412.GN14170-dv86pmgwkMBes7Z6vYuT8azUEOm+Xw19@public.gmane.org>
2016-03-17 14:41 ` Linus Walleij
2016-03-17 15:14 ` [Intel-gfx] " Jani Nikula
2016-03-11 17:06 ` [PATCH 2/3] pinctrl:Intel: clear interrupt status for every IRQ setup Qipeng Zha
2016-03-11 9:45 ` Mika Westerberg [this message]
2016-03-14 1:24 ` Zheng, Qi
2016-03-14 8:44 ` Westerberg, Mika
2016-03-14 9:02 ` Zheng, Qi
2016-03-14 9:20 ` Westerberg, Mika
2016-03-14 12:40 ` Linus Walleij
2016-03-14 12:54 ` Westerberg, Mika
2016-03-14 13:00 ` Westerberg, Mika
2016-03-14 14:26 ` Westerberg, Mika
2016-03-15 5:17 ` Zheng, Qi
2016-03-11 17:06 ` [PATCH 3/3] pinctrl:Intel: make the high level interrupt working Qipeng Zha
2016-03-11 9:49 ` Mika Westerberg
2016-03-14 1:26 ` Zheng, Qi
2016-03-14 1:40 ` Zheng, Qi
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