From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>,
Thomas Gleixner <tglx@linutronix.de>,
Phidias Chiang <phidias.chiang@canonical.com>,
Anisse Astier <anisse@astier.eu>,
Heikki Krogerus <heikki.krogerus@linux.intel.com>,
Yu C Chen <yu.c.chen@intel.com>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] pinctrl: cherryview: Do not mask all interrupts on probe
Date: Thu, 15 Sep 2016 18:42:33 +0300 [thread overview]
Message-ID: <20160915154233.GH1811@lahna.fi.intel.com> (raw)
In-Reply-To: <CACRpkdZBbcL87Hq94sFYdDOWnC7S_JGtArTNMimAps663UQNgw@mail.gmail.com>
On Thu, Sep 15, 2016 at 02:39:47PM +0200, Linus Walleij wrote:
> On Wed, Sep 14, 2016 at 5:12 PM, Mika Westerberg
> <mika.westerberg@linux.intel.com> wrote:
> > On Wed, Sep 14, 2016 at 02:46:01PM +0200, Linus Walleij wrote:
> >> > I'm going to re-read the hardware spec and see if there is anything we
> >> > can do about this. The newer hardware (Skylake, Broxton) has a bit that
> >> > tells the IRQ is routed directly to I/O-APIC but unfortunately Braswell
> >> > misses that. There may be something else, though.
> >>
> >> So as far as we can determine:
> >>
> >> (A) we are running on Braswell and
> >> (B) we are probing this driver
> >>
> >> we can conclude that
> >>
> >> (C) IRQs A,B,C are reserved by BIOS?
> >>
> >> That sounds doable?
> >
> > Yes, it's doable but that requires some hard coding in the driver :-/
>
> >From my point of view that is the lesser of two evils.
>
> We only have hard-coding (syntactic) madness over having
> behaviour-dependent (semantic) madness.
I re-read the hardware spec now and it occured to me that for north and
southwest community, only the first 8 IRQs can be used as interrupts
(all GPIOs which have IntSel value < 8). Rest can only trigger GPEs
which are used for EC events.
I'll submit patches shortly using this information and valid_mask as you
suggested.
next prev parent reply other threads:[~2016-09-15 15:42 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-22 7:56 [PATCH] pinctrl: cherryview: Do not mask all interrupts on probe Mika Westerberg
2015-06-01 9:23 ` Mika Westerberg
2015-06-02 13:53 ` Linus Walleij
2015-06-02 14:15 ` Mika Westerberg
2015-07-29 8:51 ` João Paulo Rechi Vita
2016-08-16 16:12 ` Anisse Astier
2016-08-17 8:13 ` Mika Westerberg
2016-08-17 13:42 ` Anisse Astier
2016-08-18 12:13 ` Mika Westerberg
2016-08-18 13:52 ` Anisse Astier
2016-08-18 13:58 ` Mika Westerberg
2016-09-08 10:13 ` Phidias Chiang
2016-09-08 10:24 ` Mika Westerberg
2016-09-08 16:28 ` Phidias Chiang
2016-09-09 6:18 ` Mika Westerberg
2016-09-09 8:23 ` Phidias Chiang
2016-09-09 8:58 ` Mika Westerberg
2016-09-11 8:05 ` Mika Westerberg
2016-09-12 6:56 ` Phidias Chiang
2016-09-12 9:04 ` Mika Westerberg
2016-09-12 13:04 ` Phidias Chiang
2016-09-12 13:11 ` Mika Westerberg
2016-09-13 9:18 ` Linus Walleij
2016-09-13 9:33 ` Mika Westerberg
2016-09-13 12:22 ` Linus Walleij
2016-09-13 12:52 ` Mika Westerberg
2016-09-13 20:57 ` Linus Walleij
2016-09-14 8:26 ` Mika Westerberg
2016-09-14 12:46 ` Linus Walleij
2016-09-14 15:12 ` Mika Westerberg
2016-09-15 12:39 ` Linus Walleij
2016-09-15 15:42 ` Mika Westerberg [this message]
2016-09-15 15:52 ` [PATCH 1/2] gpiolib: Add possibility to mask which GPIOs are added to IRQ domain Mika Westerberg
2016-09-15 15:52 ` [PATCH 2/2] pinctrl: cherryview: Do not add all southwest and north GPIOs " Mika Westerberg
2016-09-15 16:07 ` [PATCH 1/2] gpiolib: Add possibility to mask which GPIOs are added " Marc Zyngier
2016-09-15 18:12 ` Mika Westerberg
2016-09-15 18:50 ` Thomas Gleixner
2016-09-18 11:16 ` Linus Walleij
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