Re: Sparse GPIO maps with pinctrl-msm.c?

[Bjorn Andersson <bjorn.andersson@linaro.org>]

On Fri 16 Jun 12:07 PDT 2017, Timur Tabi wrote:
> On 06/16/2017 01:50 PM, Bjorn Andersson wrote:
[..]
> > For GPIOs this doesn't make a difference, but rather than naming the
> > pins "sdc2_data" there should be pins named "SDC2_DATA_0" ...
> > "SDC2_DATA_3". But the configurable entity is "sdc2_data", so that's
> > what should go in the "group".
> 
> I don't understand the SDC_PINGROUP() macro.  Most of the values are set to
> -1:
> 
> 		.intr_cfg_reg = 0,			\
> 		.intr_status_reg = 0,			\
> 		.intr_target_reg = 0,			\
> 		.mux_bit = -1,				\
> 		.pull_bit = pull,			\
> 		.drv_bit = drv,				\
> 		.oe_bit = -1,				\
> 		.in_bit = -1,				\
> 		.out_bit = -1,				\
> 

In some cases SDC function can be found muxed among GPIOs, in others
there are dedicated configuration in TLMM for SDC properties. This entry
represent the latter.

You can set the bias and drive-strength, but there's no mux
configuration, no enable/disable, no interrupt and no value.

> I'm not familiar with that SOC, but this looks to me like it's a non-TLMM
> GPIO.

It's a non-GPIO configuration in TLMM.

> In that case, what's the point of including it?  What does this
> actually do?  It's a "configurable entity", but there doesn't appear
> any way to configure it.
> 

It's common to find at least the primary SDC on dedicated pins and hence
separate configuration. But as it's not available for generic IO
operations the properties/operations typical for this are not available.

> > According to the pinctrl documentation we should actually have called
> > the pins of the sdc2_data group "P3", "R6", "T7" and "P7" (for
> > APQ8016E). If nothing else this would probably have made things less
> > confusing.
> 
> Not for me.
> 

:)

Regards,
Bjorn