From: Peter Robinson <pbrobinson@gmail.com>
To: Linus Walleij <linus.walleij@linaro.org>, linux-gpio@vger.kernel.org
Cc: Peter Robinson <pbrobinson@gmail.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Heikki Krogerus <heikki.krogerus@linux.intel.com>
Subject: [PATCH] pinctrl: intel: wrap Intel pin control drivers in an architecture check
Date: Tue, 4 Jul 2017 07:49:47 +0100 [thread overview]
Message-ID: <20170704064947.10792-1-pbrobinson@gmail.com> (raw)
The Intel pin control drivers are architecture specific so add an if arch
to check for X86 or compile test to ensure continued test coverage.
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
drivers/pinctrl/intel/Kconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/pinctrl/intel/Kconfig b/drivers/pinctrl/intel/Kconfig
index 396830a41127..0c7edc321415 100644
--- a/drivers/pinctrl/intel/Kconfig
+++ b/drivers/pinctrl/intel/Kconfig
@@ -1,6 +1,7 @@
#
# Intel pin control drivers
#
+if (X86 || COMPILE_TEST)
config PINCTRL_BAYTRAIL
bool "Intel Baytrail GPIO pin control"
@@ -72,3 +73,5 @@ config PINCTRL_SUNRISEPOINT
Sunrisepoint is the PCH of Intel Skylake. This pinctrl driver
provides an interface that allows configuring of PCH pins and
using them as GPIOs.
+
+endif
--
2.13.0
next reply other threads:[~2017-07-04 6:49 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-04 6:49 Peter Robinson [this message]
2017-07-04 9:54 ` [PATCH] pinctrl: intel: wrap Intel pin control drivers in an architecture check Heikki Krogerus
2017-07-04 10:21 ` Andy Shevchenko
2017-07-05 8:01 ` Peter Robinson
2017-08-29 13:49 ` Andy Shevchenko
2017-07-31 13:41 ` Linus Walleij
2017-07-31 13:48 ` Mika Westerberg
2017-08-07 8:47 ` Linus Walleij
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