linux-gpio.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Thierry Reding <thierry.reding@gmail.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Jonathan Hunter <jonathanh@nvidia.com>,
	"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
	"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	ext Tony Lindgren <tony@atomide.com>
Subject: Re: [PATCH 00/16] gpio: Tight IRQ chip integration and banked infrastructure
Date: Fri, 15 Sep 2017 08:09:57 -0700	[thread overview]
Message-ID: <20170914185233.GA6410@aiwendil> (raw)
In-Reply-To: <CACRpkdaRsG-9YU2ufb+FxGOO38+x=AAfVUqxH5s56NH2iLw7oA@mail.gmail.com>

[-- Attachment #1: Type: text/plain, Size: 3411 bytes --]

On Thu, Sep 14, 2017 at 03:54:56PM +0200, Linus Walleij wrote:
> On Fri, Sep 1, 2017 at 8:57 PM, Thierry Reding <thierry.reding@gmail.com> wrote:
> 
> > here's the latest series of patches that implement the tighter IRQ chip
> > integration as well as the banked GPIO infrastructure that we had
> > discussed a couple of weeks/months back.
> 
> Yes it has become really tasty now, don't you think :)
> 
> I really like the series.
> 
> Banks are handled in the core, exactly as I wanted.
> 
> I will likely go in and change some things I don't like, like switching
> num_pins in the bank to num_lines. I have preferred that terminology
> to avoid confusion with pin control. So GPIO chips have lines, not pins.
> But it's so minor that I can fix it up if you don't want to.

I rebased this on today's linux-next and noticed that there was a small
conflict. I can rebase and work in the changes that you requested.

I'm travelling this week and next, so it may take until after -rc2 that
I can send out a new version that's properly build-tested.

> We also need to go in and patch Documentation/gpio/driver.txt
> to represent the current best practice. But that can be later,
> separate patch.
> 
> > The first couple of patches are mostly preparatory work in order to
> > consolidate all IRQ chip related fields in a new structure and create
> > the base functionality for adding IRQ chips.
> >
> > After that, I've added the Tegra186 GPIO support patch that makes use of
> > the new tight integration.
> >
> > To round things off the new banked GPIO infrastructure is added (along
> > with some more preparatory work), followed by the conversion of the two
> > Tegra GPIO drivers to the new infrastructure.
> 
> I have put all on a branch for pushing to the test builders to begin with.
> 
> Then I plan to make one branch with all infrastructure patches
> (patches 1-10, 12-14) and pull that into devel, then apply patch
> 11 and 15-16 directly on devel.
> 
> That way other subsystems (pinctrl ...) can pull in the infrastructure
> for people adding new gpiochips this cycle.

Sounds good.

> > Any thoughts on this? I'd like to target 4.15 with this,
> 
> Me, too.
> 
> > unless you'd be
> > willing to take this into 4.14, which I doubt at this point. The absence
> > of a GPIO driver has been hampering Tegra186 support upstream for a
> > while now, so it'd be good to make progress on this.
> 
> Sorry about that. Let's move ahead with this now, it is neat and
> clean.
> 
> What I want (as maintainer) is a bit of fingerpointing at the drivers
> that need to be converted to use the new banking infrastructure
> so they don't stay with their old crappy design pattern. OMAP is
> a clear candidate right? (Added Tony to CC...)

OMAP should be able to use this infrastructure, but it may not want to
because the semantics would change slightly. Currently OMAP registers a
GPIO chip for each bank, whereas this infrastructure exposes multiple
banks via a single chip.

There might be some userspace that relies on the existence of multiple
chips, but Tony can probably knows that better than I.

> Who else?

gpio-intel-mid.c and gpio-merrifield.c look like they could use this new
infrastructure. So do gpio-pca953x.c, gpio-stmpe.c and gpio-tc3589x.c.

gpio-ws16c48.c is another one that uses a similar pattern.

Thierry

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

  reply	other threads:[~2017-09-15 15:09 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-01 18:57 [PATCH 00/16] gpio: Tight IRQ chip integration and banked infrastructure Thierry Reding
2017-09-01 18:57 ` [PATCH 01/16] gpio: Implement tighter IRQ chip integration Thierry Reding
2017-09-01 18:57 ` [PATCH 02/16] gpio: Move irqchip into struct gpio_irq_chip Thierry Reding
2017-09-01 18:57 ` [PATCH 03/16] gpio: Move irqdomain " Thierry Reding
2017-09-01 18:57 ` [PATCH 04/16] gpio: Move irq_base to " Thierry Reding
2017-09-01 18:57 ` [PATCH 05/16] gpio: Move irq_handler " Thierry Reding
2017-09-01 18:57 ` [PATCH 06/16] gpio: Move irq_default_type " Thierry Reding
2017-09-01 18:57 ` [PATCH 07/16] gpio: Move irq_chained_parent " Thierry Reding
     [not found] ` <20170901185736.28051-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-09-01 18:57   ` [PATCH 08/16] gpio: Move irq_nested into " Thierry Reding
2017-09-01 18:57   ` [PATCH 09/16] gpio: Move irq_valid_mask " Thierry Reding
2017-09-01 18:57   ` [PATCH 11/16] gpio: Add Tegra186 support Thierry Reding
2017-09-01 18:57   ` [PATCH 12/16] gpio: omap: Fix checkpatch warnings Thierry Reding
     [not found]     ` <20170901185736.28051-13-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-09-15 22:23       ` Grygorii Strashko
2017-09-01 18:57   ` [PATCH 13/16] gpio: omap: Rename struct gpio_bank to struct omap_gpio_bank Thierry Reding
2017-09-15 22:23     ` Grygorii Strashko
2017-09-14 13:54   ` [PATCH 00/16] gpio: Tight IRQ chip integration and banked infrastructure Linus Walleij
2017-09-15 15:09     ` Thierry Reding [this message]
2017-09-15 16:57       ` Tony Lindgren
     [not found]         ` <20170915165750.GW5024-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
2017-09-15 22:26           ` Grygorii Strashko
2017-09-21 12:06           ` Linus Walleij
2017-09-01 18:57 ` [PATCH 10/16] gpio: Move lock_key into struct gpio_irq_chip Thierry Reding
2017-09-01 18:57 ` [PATCH 14/16] gpio: Add support for banked GPIO controllers Thierry Reding
     [not found]   ` <20170901185736.28051-15-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-09-14 13:59     ` Linus Walleij
2017-09-14 23:37       ` Tony Lindgren
2017-09-14 23:49         ` Tony Lindgren
2017-09-01 18:57 ` [PATCH 15/16] gpio: tegra: Use banked GPIO infrastructure Thierry Reding
2017-09-01 18:57 ` [PATCH 16/16] gpio: tegra186: " Thierry Reding

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20170914185233.GA6410@aiwendil \
    --to=thierry.reding@gmail.com \
    --cc=jonathanh@nvidia.com \
    --cc=linus.walleij@linaro.org \
    --cc=linux-gpio@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=tony@atomide.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).