* [PATCH] pinctrl: sunxi: a83t: Fix IRQ offset typo for PH11
@ 2018-12-04 9:04 Chen-Yu Tsai
[not found] ` <20181204090457.15597-1-wens-jdAy2FN1RRM@public.gmane.org>
0 siblings, 1 reply; 3+ messages in thread
From: Chen-Yu Tsai @ 2018-12-04 9:04 UTC (permalink / raw)
To: Linus Walleij, Maxime Ripard
Cc: Chen-Yu Tsai, linux-arm-kernel, linux-gpio, linux-sunxi,
linux-kernel, stable
Pin PH11 is used on various A83T board to detect a change in the OTG
port's ID pin, as in when an OTG host cable is plugged in.
The incorrect offset meant the gpiochip/irqchip was activating the wrong
pin for interrupts.
Fixes: 4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller support")
Cc: <stable@vger.kernel.org>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
index 6624499eae72..4ada80317a3b 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
@@ -568,7 +568,7 @@ static const struct sunxi_desc_pin sun8i_a83t_pins[] = {
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
- SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)), /* PH_EINT11 */
+ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)), /* PH_EINT11 */
};
static const struct sunxi_pinctrl_desc sun8i_a83t_pinctrl_data = {
--
2.20.0.rc1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] pinctrl: sunxi: a83t: Fix IRQ offset typo for PH11
[not found] ` <20181204090457.15597-1-wens-jdAy2FN1RRM@public.gmane.org>
@ 2018-12-04 9:12 ` Maxime Ripard
2018-12-07 12:32 ` Linus Walleij
1 sibling, 0 replies; 3+ messages in thread
From: Maxime Ripard @ 2018-12-04 9:12 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: Linus Walleij, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-gpio-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
stable-u79uwXL29TY76Z2rM5mHXA
[-- Attachment #1: Type: text/plain, Size: 676 bytes --]
On Tue, Dec 04, 2018 at 05:04:57PM +0800, Chen-Yu Tsai wrote:
> Pin PH11 is used on various A83T board to detect a change in the OTG
> port's ID pin, as in when an OTG host cable is plugged in.
>
> The incorrect offset meant the gpiochip/irqchip was activating the wrong
> pin for interrupts.
>
> Fixes: 4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller support")
> Cc: <stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Acked-by: Maxime Ripard <maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] pinctrl: sunxi: a83t: Fix IRQ offset typo for PH11
[not found] ` <20181204090457.15597-1-wens-jdAy2FN1RRM@public.gmane.org>
2018-12-04 9:12 ` Maxime Ripard
@ 2018-12-07 12:32 ` Linus Walleij
1 sibling, 0 replies; 3+ messages in thread
From: Linus Walleij @ 2018-12-07 12:32 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: Maxime Ripard, Linux ARM, open list:GPIO SUBSYSTEM, linux-sunxi,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, stable
On Tue, Dec 4, 2018 at 10:05 AM Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org> wrote:
> Pin PH11 is used on various A83T board to detect a change in the OTG
> port's ID pin, as in when an OTG host cable is plugged in.
>
> The incorrect offset meant the gpiochip/irqchip was activating the wrong
> pin for interrupts.
>
> Fixes: 4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller support")
> Cc: <stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Patch applied for fixes with Maxime's ACK.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 3+ messages in thread
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2018-12-04 9:04 [PATCH] pinctrl: sunxi: a83t: Fix IRQ offset typo for PH11 Chen-Yu Tsai
[not found] ` <20181204090457.15597-1-wens-jdAy2FN1RRM@public.gmane.org>
2018-12-04 9:12 ` Maxime Ripard
2018-12-07 12:32 ` Linus Walleij
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