From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [PATCH] pinctrl: sunxi: a83t: Fix IRQ offset typo for PH11 Date: Tue, 4 Dec 2018 10:12:04 +0100 Message-ID: <20181204091204.jtzk5gf2clumjwiq@flea> References: <20181204090457.15597-1-wens@csie.org> Reply-To: maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="ntukseib6hpdpxly" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Content-Disposition: inline In-Reply-To: <20181204090457.15597-1-wens-jdAy2FN1RRM@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Chen-Yu Tsai Cc: Linus Walleij , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: linux-gpio@vger.kernel.org --ntukseib6hpdpxly Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline On Tue, Dec 04, 2018 at 05:04:57PM +0800, Chen-Yu Tsai wrote: > Pin PH11 is used on various A83T board to detect a change in the OTG > port's ID pin, as in when an OTG host cable is plugged in. > > The incorrect offset meant the gpiochip/irqchip was activating the wrong > pin for interrupts. > > Fixes: 4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller support") > Cc: > Signed-off-by: Chen-Yu Tsai Acked-by: Maxime Ripard Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com --ntukseib6hpdpxly--