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From: Brian Masney <masneyb@onstation.org>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: linus.walleij@linaro.org, sboyd@kernel.org,
	bjorn.andersson@linaro.org, andy.gross@linaro.org,
	shawnguo@kernel.org, dianders@chromium.org,
	linux-gpio@vger.kernel.org, nicolas.dechesne@linaro.org,
	niklas.cassel@linaro.org, david.brown@linaro.org,
	robh+dt@kernel.org, mark.rutland@arm.com,
	thierry.reding@gmail.com, linux-arm-msm@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v5 04/14] spmi: pmic-arb: convert to v2 irq interfaces to support hierarchical IRQ chips
Date: Fri, 18 Jan 2019 07:27:16 -0500	[thread overview]
Message-ID: <20190118122716.GA32143@basecamp> (raw)
In-Reply-To: <d2e3c91c-2a54-e130-7512-e4a65bf2794d@arm.com>

Hi Marc,

On Thu, Jan 17, 2019 at 11:22:59AM +0000, Marc Zyngier wrote:
> > -static int qpnpint_irq_domain_map(struct irq_domain *d,
> > -				  unsigned int virq,
> > -				  irq_hw_number_t hwirq)
> > -{
> > -	struct spmi_pmic_arb *pmic_arb = d->host_data;
> >  
> > +static void qpnpint_irq_domain_map(struct spmi_pmic_arb *pmic_arb,
> > +				   struct irq_domain *domain, unsigned int virq,
> > +				   irq_hw_number_t hwirq)
> > +{
> >  	dev_dbg(&pmic_arb->spmic->dev, "virq = %u, hwirq = %lu\n", virq, hwirq);
> >  
> > -	irq_set_chip_and_handler(virq, &pmic_arb_irqchip, handle_level_irq);
> > -	irq_set_chip_data(virq, d->host_data);
> > -	irq_set_noprobe(virq);
> > +	irq_domain_set_info(domain, virq, hwirq, &pmic_arb_irqchip, pmic_arb,
> > +			    handle_level_irq, NULL, NULL);
> 
> I understand you haven't changed the existing semantic here by always
> setting the handler to handle_level_irq. But is that guaranteed to
> always be the case? See below.
> 
> > +}
> > +
> > +static int qpnpint_irq_domain_alloc(struct irq_domain *domain,
> > +				    unsigned int virq, unsigned int nr_irqs,
> > +				    void *data)
> > +{
> > +	struct spmi_pmic_arb *pmic_arb = domain->host_data;
> > +	struct irq_fwspec *fwspec = data;
> > +	irq_hw_number_t hwirq;
> > +	unsigned int type;
> > +	int ret, i;
> > +
> > +	ret = qpnpint_irq_domain_translate(domain, fwspec, &hwirq, &type);
> 
> Here, you extract the trigger from DT.
> 
> > +	if (ret)
> > +		return ret;
> > +
> > +	for (i = 0; i < nr_irqs; i++)
> > +		qpnpint_irq_domain_map(pmic_arb, domain, virq + i, hwirq + i);
> 
> Shouldn't you propagate it into the mapping function so that the handler
> can be selected accordingly? Or does the interrupt controller convert
> edge signals to level somehow?

qpnpint_irq_set_type() calls irq_set_handler_locked() to set the hander
to be either handle_edge_irq() or handle_level_irq(). So the handler is
initially setup incorrectly in some cases, but then setup correctly (via
__irq_set_trigger) when __setup_irq() is called by
request_threaded_irq().

It looks like that this will cause problems with shared IRQs to work as
expected.

I can rework this code and get this fixed.

Brian

  reply	other threads:[~2019-01-18 12:27 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-17  0:32 [PATCH v5 00/14] qcom: spmi: add support for hierarchical IRQ chip Brian Masney
2019-01-17  0:32 ` [PATCH v5 01/14] dt-bindings: pinctrl: qcom-pmic-gpio: add qcom,pmi8998-gpio binding Brian Masney
2019-01-17  0:32 ` [PATCH v5 02/14] pinctrl: qcom: spmi-gpio: add support for three new variants Brian Masney
2019-01-17  0:32 ` [PATCH v5 03/14] pinctrl: qcom: spmi-gpio: hardcode IRQ counts Brian Masney
2019-01-17  0:32 ` [PATCH v5 04/14] spmi: pmic-arb: convert to v2 irq interfaces to support hierarchical IRQ chips Brian Masney
2019-01-17 11:22   ` Marc Zyngier
2019-01-18 12:27     ` Brian Masney [this message]
2019-01-18 13:12       ` Marc Zyngier
2019-01-17  0:32 ` [PATCH v5 05/14] gpio: add irq domain activate/deactivate functions Brian Masney
2019-01-17  0:32 ` [PATCH v5 06/14] spmi: pmic-arb: disassociate old virq if hwirq mapping already exists Brian Masney
2019-01-17  0:32 ` [PATCH v5 07/14] qcom: spmi-gpio: add support for hierarchical IRQ chip Brian Masney
2019-01-17 11:32   ` Marc Zyngier
2019-01-18 12:42     ` Brian Masney
2019-01-18 13:21       ` Marc Zyngier
2019-01-17  0:32 ` [PATCH v5 08/14] ARM: dts: qcom: pm8941: add interrupt controller properties Brian Masney
2019-01-17  0:32 ` [PATCH v5 09/14] ARM: dts: qcom: pma8084: " Brian Masney
2019-01-17  0:32 ` [PATCH v5 10/14] arm64: dts: qcom: pm8005: " Brian Masney
2019-01-17  0:32 ` [PATCH v5 11/14] arm64: dts: qcom: pm8998: " Brian Masney
2019-01-17  0:32 ` [PATCH v5 12/14] arm64: dts: qcom: pmi8994: " Brian Masney
2019-01-17  0:32 ` [PATCH v5 13/14] arm64: dts: qcom: pmi8998: " Brian Masney
2019-01-17  0:32 ` [PATCH v5 14/14] spmi: pmic-arb: revert "disassociate old virq if hwirq mapping already exists" Brian Masney

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