From: kbuild test robot <lkp@intel.com>
To: Andrew Jeffery <andrew@aj.id.au>
Cc: kbuild-all@01.org, linux-gpio@vger.kernel.org,
Linus Walleij <linus.walleij@linaro.org>
Subject: [pinctrl:devel 72/79] drivers/pinctrl/aspeed/pinctrl-aspeed.h:547:28: error: field 'pinmux' has incomplete type
Date: Thu, 4 Jul 2019 20:10:19 +0800 [thread overview]
Message-ID: <201907042014.2WXYWvdg%lkp@intel.com> (raw)
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tree: https://kernel.googlesource.com/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git devel
head: eb0a2daa45b83d67b69a620243ed844e9dfa671b
commit: efa5623981b72f6b5f95933d1c36ed2518c2ee4e [72/79] pinctrl: aspeed: Split out pinmux from general pinctrl
config: arm-allmodconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 7.4.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout efa5623981b72f6b5f95933d1c36ed2518c2ee4e
# save the attached .config to linux build tree
GCC_VERSION=7.4.0 make.cross ARCH=arm
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All error/warnings (new ones prefixed by >>):
vim +/pinmux +547 drivers/pinctrl/aspeed/pinctrl-aspeed.h
439
440 #define MS_PIN_DECL_(pin, ...) \
441 static const struct aspeed_sig_expr **PIN_EXPRS_SYM(pin)[] = \
442 { __VA_ARGS__, NULL }; \
443 static const struct aspeed_pin_desc PIN_SYM(pin) = \
444 { #pin, PIN_EXPRS_PTR(pin) }
445
446 /**
447 * Declare a multi-signal pin
448 *
449 * @pin: The pin number
450 * @other: Macro name for "other" functionality (subjected to stringification)
451 * @high: Macro name for the highest priority signal functions
452 * @low: Macro name for the low signal functions
453 *
454 * For example:
455 *
456 * #define A8 56
457 * SIG_EXPR_DECL(ROMD8, ROM16, SIG_DESC_SET(SCU90, 6));
458 * SIG_EXPR_DECL(ROMD8, ROM16S, SIG_DESC_SET(HW_STRAP1, 4),
459 * { HW_STRAP1, GENMASK(1, 0), 0, 0 });
460 * SIG_EXPR_LIST_DECL(ROMD8, SIG_EXPR_PTR(ROMD8, ROM16),
461 * SIG_EXPR_PTR(ROMD8, ROM16S));
462 * SIG_EXPR_LIST_DECL_SINGLE(NCTS6, NCTS6, SIG_DESC_SET(SCU90, 7));
463 * MS_PIN_DECL(A8, GPIOH0, ROMD8, NCTS6);
464 */
465 #define MS_PIN_DECL(pin, other, high, low) \
466 SIG_EXPR_LIST_DECL_SINGLE(other, other); \
467 MS_PIN_DECL_(pin, \
468 SIG_EXPR_LIST_PTR(high), \
469 SIG_EXPR_LIST_PTR(low), \
470 SIG_EXPR_LIST_PTR(other))
471
472 #define PIN_GROUP_SYM(func) pins_ ## func
> 473 #define FUNC_GROUP_SYM(func) groups_ ## func
474 #define FUNC_GROUP_DECL(func, ...) \
475 static const int PIN_GROUP_SYM(func)[] = { __VA_ARGS__ }; \
> 476 static const char *FUNC_GROUP_SYM(func)[] = { #func }
477
478 /**
479 * Declare a single signal pin
480 *
481 * @pin: The pin number
482 * @other: Macro name for "other" functionality (subjected to stringification)
483 * @sig: Macro name for the signal (subjected to stringification)
484 *
485 * For example:
486 *
487 * #define E3 80
488 * SIG_EXPR_LIST_DECL_SINGLE(SCL5, I2C5, I2C5_DESC);
489 * SS_PIN_DECL(E3, GPIOK0, SCL5);
490 */
491 #define SS_PIN_DECL(pin, other, sig) \
492 SIG_EXPR_LIST_DECL_SINGLE(other, other); \
493 MS_PIN_DECL_(pin, SIG_EXPR_LIST_PTR(sig), SIG_EXPR_LIST_PTR(other))
494
495 /**
496 * Single signal, single function pin declaration
497 *
498 * @pin: The pin number
499 * @other: Macro name for "other" functionality (subjected to stringification)
500 * @sig: Macro name for the signal (subjected to stringification)
501 * @...: Signal descriptors that define the function expression
502 *
503 * For example:
504 *
505 * SSSF_PIN_DECL(A4, GPIOA2, TIMER3, SIG_DESC_SET(SCU80, 2));
506 */
507 #define SSSF_PIN_DECL(pin, other, sig, ...) \
508 SIG_EXPR_LIST_DECL_SINGLE(sig, sig, __VA_ARGS__); \
509 SIG_EXPR_LIST_DECL_SINGLE(other, other); \
510 MS_PIN_DECL_(pin, SIG_EXPR_LIST_PTR(sig), SIG_EXPR_LIST_PTR(other)); \
> 511 FUNC_GROUP_DECL(sig, pin)
512
513 #define GPIO_PIN_DECL(pin, gpio) \
514 SIG_EXPR_LIST_DECL_SINGLE(gpio, gpio); \
515 MS_PIN_DECL_(pin, SIG_EXPR_LIST_PTR(gpio))
516
517 /**
518 * @param The pinconf parameter type
519 * @pins The pin range this config struct covers, [low, high]
520 * @reg The register housing the configuration bits
521 * @mask The mask to select the bits of interest in @reg
522 */
523 struct aspeed_pin_config {
524 enum pin_config_param param;
525 unsigned int pins[2];
526 unsigned int reg;
527 u8 bit;
528 u8 value;
529 };
530
531 #define ASPEED_PINCTRL_PIN(name_) \
532 [name_] = { \
533 .number = name_, \
534 .name = #name_, \
535 .drv_data = (void *) &(PIN_SYM(name_)) \
536 }
537
538 struct aspeed_pinctrl_data {
539 struct regmap *scu;
540
541 const struct pinctrl_pin_desc *pins;
542 const unsigned int npins;
543
544 const struct aspeed_pin_config *configs;
545 const unsigned int nconfigs;
546
> 547 struct aspeed_pinmux_data pinmux;
548 };
549
---
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next reply other threads:[~2019-07-04 12:11 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-04 12:10 kbuild test robot [this message]
2019-07-05 1:44 ` [pinctrl:devel 72/79] drivers/pinctrl/aspeed/pinctrl-aspeed.h:547:28: error: field 'pinmux' has incomplete type Andrew Jeffery
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