* [PATCH] pinctrl: aspeed: Fix missed include
@ 2019-07-09 13:31 Linus Walleij
0 siblings, 0 replies; only message in thread
From: Linus Walleij @ 2019-07-09 13:31 UTC (permalink / raw)
To: linux-gpio; +Cc: Linus Walleij, Andrew Jeffery
Some SPDX churn made my fixes drop an important include
from the Aspeed pinctrl header. Fix it up.
Cc: Andrew Jeffery <andrew@aj.id.au>
Reported-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/pinctrl/aspeed/pinctrl-aspeed.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.h b/drivers/pinctrl/aspeed/pinctrl-aspeed.h
index 9b20b1c03802..b7790395aead 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed.h
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.h
@@ -16,6 +16,8 @@
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/regmap.h>
+#include "pinmux-aspeed.h"
+
/*
* The ASPEED SoCs provide typically more than 200 pins for GPIO and other
* functions. The SoC function enabled on a pin is determined on a priority
--
2.21.0
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