From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Bartosz Golaszewski <bgolaszewski@baylibre.com>,
Linus Walleij <linus.walleij@linaro.org>,
linux-gpio@vger.kernel.org,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Hans de Goede <hdegoede@redhat.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
David Cohen <david.a.cohen@linux.intel.com>,
Thierry Reding <treding@nvidia.com>
Subject: [PATCH v2 5/7] gpio: merrifield: Pass irqchip when adding gpiochip
Date: Tue, 5 Nov 2019 22:35:55 +0200 [thread overview]
Message-ID: <20191105203557.78562-6-andriy.shevchenko@linux.intel.com> (raw)
In-Reply-To: <20191105203557.78562-1-andriy.shevchenko@linux.intel.com>
We need to convert all old gpio irqchips to pass the irqchip
setup along when adding the gpio_chip. For more info see
drivers/gpio/TODO.
For chained irqchips this is a pretty straight-forward conversion.
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: David Cohen <david.a.cohen@linux.intel.com>
Cc: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/gpio/gpio-merrifield.c | 33 ++++++++++++++++++++-------------
1 file changed, 20 insertions(+), 13 deletions(-)
diff --git a/drivers/gpio/gpio-merrifield.c b/drivers/gpio/gpio-merrifield.c
index e96d8e517e26..60d6ad012881 100644
--- a/drivers/gpio/gpio-merrifield.c
+++ b/drivers/gpio/gpio-merrifield.c
@@ -362,8 +362,9 @@ static void mrfld_irq_handler(struct irq_desc *desc)
chained_irq_exit(irqchip, desc);
}
-static void mrfld_irq_init_hw(struct mrfld_gpio *priv)
+static int mrfld_irq_init_hw(struct gpio_chip *chip)
{
+ struct mrfld_gpio *priv = gpiochip_get_data(chip);
void __iomem *reg;
unsigned int base;
@@ -375,6 +376,8 @@ static void mrfld_irq_init_hw(struct mrfld_gpio *priv)
reg = gpio_reg(&priv->chip, base, GFER);
writel(0, reg);
}
+
+ return 0;
}
static const char *mrfld_gpio_get_pinctrl_dev_name(struct mrfld_gpio *priv)
@@ -420,6 +423,7 @@ static int mrfld_gpio_add_pin_ranges(struct gpio_chip *chip)
static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{
+ struct gpio_irq_chip *girq;
struct mrfld_gpio *priv;
u32 gpio_base, irq_base;
void __iomem *base;
@@ -467,24 +471,27 @@ static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id
raw_spin_lock_init(&priv->lock);
+ girq = &priv->chip.irq;
+ girq->chip = &mrfld_irqchip;
+ girq->init_hw = mrfld_irq_init_hw;
+ girq->parent_handler = mrfld_irq_handler;
+ girq->num_parents = 1;
+ girq->parents = devm_kcalloc(&pdev->dev, girq->num_parents,
+ sizeof(*girq->parents),
+ GFP_KERNEL);
+ if (!girq->parents)
+ return -ENOMEM;
+ girq->parents[0] = pdev->irq;
+ girq->first = irq_base;
+ girq->default_type = IRQ_TYPE_NONE;
+ girq->handler = handle_bad_irq;
+
retval = devm_gpiochip_add_data(&pdev->dev, &priv->chip, priv);
if (retval) {
dev_err(&pdev->dev, "gpiochip_add error %d\n", retval);
return retval;
}
- retval = gpiochip_irqchip_add(&priv->chip, &mrfld_irqchip, irq_base,
- handle_bad_irq, IRQ_TYPE_NONE);
- if (retval) {
- dev_err(&pdev->dev, "could not connect irqchip to gpiochip\n");
- return retval;
- }
-
- mrfld_irq_init_hw(priv);
-
- gpiochip_set_chained_irqchip(&priv->chip, &mrfld_irqchip, pdev->irq,
- mrfld_irq_handler);
-
pci_set_drvdata(pdev, priv);
return 0;
}
--
2.24.0.rc1
next prev parent reply other threads:[~2019-11-05 20:36 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-05 20:35 [RESEND][PATCH v2 0/7] gpiolib: fix GPIO <-> pin mapping registration Andy Shevchenko
2019-11-05 20:35 ` [PATCH v2 1/7] gpiolib: Switch order of valid mask and hw init Andy Shevchenko
2019-11-05 20:35 ` [PATCH v2 2/7] gpiolib: No need to call gpiochip_remove_pin_ranges() twice Andy Shevchenko
2019-11-05 20:35 ` [PATCH v2 3/7] gpiolib: Introduce ->add_pin_ranges() callback Andy Shevchenko
2019-11-06 13:51 ` Mika Westerberg
2019-11-13 9:46 ` Linus Walleij
2019-11-13 13:22 ` Andy Shevchenko
2019-11-13 17:25 ` Linus Walleij
2019-11-13 17:47 ` Andy Shevchenko
2019-11-05 20:35 ` [PATCH v2 4/7] gpio: merrifield: Add GPIO <-> pin mapping ranges via callback Andy Shevchenko
2019-11-06 13:54 ` Mika Westerberg
2019-11-06 16:52 ` Andy Shevchenko
2019-11-05 20:35 ` Andy Shevchenko [this message]
2019-11-06 13:56 ` [PATCH v2 5/7] gpio: merrifield: Pass irqchip when adding gpiochip Mika Westerberg
2019-11-05 20:35 ` [PATCH v2 6/7] pinctrl: baytrail: Add GPIO <-> pin mapping ranges via callback Andy Shevchenko
2019-11-06 13:56 ` Mika Westerberg
2019-11-05 20:35 ` [PATCH v2 7/7] pinctrl: baytrail: Pass irqchip when adding gpiochip Andy Shevchenko
2019-11-06 14:00 ` Mika Westerberg
2019-11-06 11:59 ` [RESEND][PATCH v2 0/7] gpiolib: fix GPIO <-> pin mapping registration Hans de Goede
2019-11-06 17:30 ` Andy Shevchenko
2019-11-08 9:40 ` Linus Walleij
2019-11-08 13:39 ` Andy Shevchenko
2019-11-13 9:43 ` Linus Walleij
2019-11-13 13:28 ` Andy Shevchenko
2019-11-13 13:37 ` Andy Shevchenko
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