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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id o7sm1577093pfg.138.2019.12.10.23.09.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Dec 2019 23:09:10 -0800 (PST) Date: Tue, 10 Dec 2019 23:09:08 -0800 From: Bjorn Andersson To: Maulik Shah Cc: agross@kernel.org, robh+dt@kernel.org, linus.walleij@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, mka@chromium.org, swboyd@chromium.org, evgreen@chromium.org, dianders@chromium.org Subject: Re: [PATCH 1/2] pinctrl: qcom: sc7180: Add GPIO wakeup interrupt map Message-ID: <20191211070908.GG3143381@builder> References: <1572419178-5750-1-git-send-email-mkshah@codeaurora.org> <1572419178-5750-2-git-send-email-mkshah@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1572419178-5750-2-git-send-email-mkshah@codeaurora.org> User-Agent: Mutt/1.12.2 (2019-09-21) Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On Wed 30 Oct 00:06 PDT 2019, Maulik Shah wrote: > GPIOs that can be configured as wakeup sources, have their > interrupt lines routed to PDC interrupt controller. > > Provide the interrupt map of the GPIO to its wakeup capable > interrupt parent. > > Signed-off-by: Maulik Shah Acked-by: Bjorn Andersson @Linus, please take this patch through your tree and I'll take patch 2 through the arm tree. Regards, Bjorn > --- > drivers/pinctrl/qcom/pinctrl-sc7180.c | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/drivers/pinctrl/qcom/pinctrl-sc7180.c b/drivers/pinctrl/qcom/pinctrl-sc7180.c > index 6399c8a..8a2b97c 100644 > --- a/drivers/pinctrl/qcom/pinctrl-sc7180.c > +++ b/drivers/pinctrl/qcom/pinctrl-sc7180.c > @@ -1097,6 +1097,22 @@ static const struct msm_pingroup sc7180_groups[] = { > [126] = SDC_QDSD_PINGROUP(sdc2_data, 0x97b000, 9, 0), > }; > > +static const struct msm_gpio_wakeirq_map sc7180_pdc_map[] = { > + {0, 40}, {3, 50}, {4, 42}, {5, 70}, {6, 41}, {9, 35}, > + {10, 80}, {11, 51}, {16, 20}, {21, 55}, {22, 90}, {23, 21}, > + {24, 61}, {26, 52}, {28, 36}, {30, 100}, {31, 33}, {32, 81}, > + {33, 62}, {34, 43}, {36, 91}, {37, 53}, {38, 63}, {39, 72}, > + {41, 101}, {42, 7}, {43, 34}, {45, 73}, {47, 82}, {49, 17}, > + {52, 109}, {53, 102}, {55, 92}, {56, 56}, {57, 57}, {58, 83}, > + {59, 37}, {62, 110}, {63, 111}, {64, 74}, {65, 44}, {66, 93}, > + {67, 58}, {68, 112}, {69, 32}, {70, 54}, {72, 59}, {73, 64}, > + {74, 71}, {78, 31}, {82, 30}, {85, 103}, {86, 38}, {87, 39}, > + {88, 45}, {89, 46}, {90, 47}, {91, 48}, {92, 60}, {93, 49}, > + {94, 84}, {95, 94}, {98, 65}, {101, 66}, {104, 67}, {109, 104}, > + {110, 68}, {113, 69}, {114, 113}, {115, 108}, {116, 121}, > + {117, 114}, {118, 119}, > +}; > + > static const struct msm_pinctrl_soc_data sc7180_pinctrl = { > .pins = sc7180_pins, > .npins = ARRAY_SIZE(sc7180_pins), > @@ -1107,6 +1123,8 @@ static const struct msm_pinctrl_soc_data sc7180_pinctrl = { > .ngpios = 120, > .tiles = sc7180_tiles, > .ntiles = ARRAY_SIZE(sc7180_tiles), > + .wakeirq_map = sc7180_pdc_map, > + .nwakeirq_map = ARRAY_SIZE(sc7180_pdc_map), > }; > > static int sc7180_pinctrl_probe(struct platform_device *pdev) > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation >