From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Mathias Nyman <mathias.nyman@linux.intel.com>,
Hans de Goede <hdegoede@redhat.com>
Subject: Re: [PATCH 2/2] pinctrl: intel: Pass irqchip when adding gpiochip
Date: Thu, 9 Jan 2020 13:13:43 +0200 [thread overview]
Message-ID: <20200109111343.GN32742@smile.fi.intel.com> (raw)
In-Reply-To: <20200109075329.398347-2-linus.walleij@linaro.org>
On Thu, Jan 09, 2020 at 08:53:29AM +0100, Linus Walleij wrote:
> We need to convert all old gpio irqchips to pass the irqchip
> setup along when adding the gpio_chip. For more info see
> drivers/gpio/TODO.
>
> For chained irqchips this is a pretty straight-forward conversion.
>
Pushed to my review and testing queue, thanks!
> Cc: Hans de Goede <hdegoede@redhat.com>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> Please apply this to the Intel pinctrl tree when you are
> happy with the result!
> ---
> drivers/pinctrl/intel/pinctrl-intel.c | 26 +++++++++++++-------------
> 1 file changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
> index b479bcf1e246..ffacd77861f7 100644
> --- a/drivers/pinctrl/intel/pinctrl-intel.c
> +++ b/drivers/pinctrl/intel/pinctrl-intel.c
> @@ -1224,6 +1224,7 @@ static unsigned int intel_gpio_ngpio(const struct intel_pinctrl *pctrl)
> static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
> {
> int ret;
> + struct gpio_irq_chip *girq;
>
> pctrl->chip = intel_gpio_chip;
>
> @@ -1244,16 +1245,9 @@ static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
> pctrl->irqchip.irq_set_wake = intel_gpio_irq_wake;
> pctrl->irqchip.flags = IRQCHIP_MASK_ON_SUSPEND;
>
> - ret = devm_gpiochip_add_data(pctrl->dev, &pctrl->chip, pctrl);
> - if (ret) {
> - dev_err(pctrl->dev, "failed to register gpiochip\n");
> - return ret;
> - }
> -
> /*
> - * We need to request the interrupt here (instead of providing chip
> - * to the irq directly) because on some platforms several GPIO
> - * controllers share the same interrupt line.
> + * On some platforms several GPIO controllers share the same interrupt
> + * line.
> */
> ret = devm_request_irq(pctrl->dev, irq, intel_gpio_irq,
> IRQF_SHARED | IRQF_NO_THREAD,
> @@ -1263,14 +1257,20 @@ static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
> return ret;
> }
>
> - ret = gpiochip_irqchip_add(&pctrl->chip, &pctrl->irqchip, 0,
> - handle_bad_irq, IRQ_TYPE_NONE);
> + girq = &pctrl->chip.irq;
> + girq->chip = &pctrl->irqchip;
> + /* This will let us handle the IRQ in the driver */
> + girq->parent_handler = NULL;
> + girq->num_parents = 0;
> + girq->default_type = IRQ_TYPE_NONE;
> + girq->handler = handle_bad_irq;
> +
> + ret = devm_gpiochip_add_data(pctrl->dev, &pctrl->chip, pctrl);
> if (ret) {
> - dev_err(pctrl->dev, "failed to add irqchip\n");
> + dev_err(pctrl->dev, "failed to register gpiochip\n");
> return ret;
> }
>
> - gpiochip_set_chained_irqchip(&pctrl->chip, &pctrl->irqchip, irq, NULL);
> return 0;
> }
>
> --
> 2.23.0
>
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2020-01-09 11:13 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-09 7:53 [PATCH 1/2] pinctrl: intel: Add GPIO <-> pin mapping ranges via callback Linus Walleij
2020-01-09 7:53 ` [PATCH 2/2] pinctrl: intel: Pass irqchip when adding gpiochip Linus Walleij
2020-01-09 10:22 ` Mika Westerberg
2020-01-09 11:13 ` Andy Shevchenko [this message]
2020-01-09 10:21 ` [PATCH 1/2] pinctrl: intel: Add GPIO <-> pin mapping ranges via callback Mika Westerberg
2020-01-09 11:13 ` Andy Shevchenko
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