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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id k26sm143306ots.3.2020.04.20.12.19.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Apr 2020 12:19:42 -0700 (PDT) Received: (nullmailer pid 9370 invoked by uid 1000); Mon, 20 Apr 2020 19:19:41 -0000 Date: Mon, 20 Apr 2020 14:19:41 -0500 From: Rob Herring To: Anson Huang Cc: linus.walleij@linaro.org, bgolaszewski@baylibre.com, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Linux-imx@nxp.com Subject: Re: [PATCH] dt-bindings: gpio: Convert i.MX to json-schema Message-ID: <20200420191941.GA6101@bogus> References: <1586770849-15693-1-git-send-email-Anson.Huang@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1586770849-15693-1-git-send-email-Anson.Huang@nxp.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On Mon, Apr 13, 2020 at 05:40:49PM +0800, Anson Huang wrote: > Convert the i.MX GPIO binding to DT schema format using json-schema. > > Signed-off-by: Anson Huang > --- > .../devicetree/bindings/gpio/fsl-imx-gpio.txt | 35 ----------- > .../devicetree/bindings/gpio/fsl-imx-gpio.yaml | 72 ++++++++++++++++++++++ > 2 files changed, 72 insertions(+), 35 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/gpio/fsl-imx-gpio.txt > create mode 100644 Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml > > diff --git a/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.txt b/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.txt > deleted file mode 100644 > index b4cd9f90..0000000 > --- a/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.txt > +++ /dev/null > @@ -1,35 +0,0 @@ > -* Freescale i.MX/MXC GPIO controller > - > -Required properties: > -- compatible : Should be "fsl,-gpio" > -- reg : Address and length of the register set for the device > -- interrupts : Should be the port interrupt shared by all 32 pins, if > - one number. If two numbers, the first one is the interrupt shared > - by low 16 pins and the second one is for high 16 pins. > -- gpio-controller : Marks the device node as a gpio controller. > -- #gpio-cells : Should be two. The first cell is the pin number and > - the second cell is used to specify the gpio polarity: > - 0 = active high > - 1 = active low > -- interrupt-controller: Marks the device node as an interrupt controller. > -- #interrupt-cells : Should be 2. The first cell is the GPIO number. > - The second cell bits[3:0] is used to specify trigger type and level flags: > - 1 = low-to-high edge triggered. > - 2 = high-to-low edge triggered. > - 4 = active high level-sensitive. > - 8 = active low level-sensitive. > - > -Optional properties: > -- clocks: the clock for clocking the GPIO silicon > - > -Example: > - > -gpio0: gpio@73f84000 { > - compatible = "fsl,imx51-gpio", "fsl,imx35-gpio"; > - reg = <0x73f84000 0x4000>; > - interrupts = <50 51>; > - gpio-controller; > - #gpio-cells = <2>; > - interrupt-controller; > - #interrupt-cells = <2>; > -}; > diff --git a/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml b/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml > new file mode 100644 > index 0000000..465104c > --- /dev/null > +++ b/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml > @@ -0,0 +1,72 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/gpio/fsl-imx-gpio.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Freescale i.MX/MXC GPIO controller > + > +maintainers: > + - Anson Huang > + > +properties: > + compatible: > + oneOf: > + - items: > + - enum: > + - fsl,imx1-gpio > + - fsl,imx21-gpio > + - fsl,imx31-gpio > + - fsl,imx35-gpio > + - fsl,imx7d-gpio compatible: enum: - fsl,imx1-gpio - fsl,imx21-gpio - fsl,imx31-gpio - fsl,imx35-gpio - fsl,imx7d-gpio > + > + reg: > + maxItems: 1 > + > + interrupts: > + description: | > + Should be the port interrupt shared by all 32 pins, if one number. > + If two numbers, the first one is the interrupt shared by low 16 pins > + and the second one is for high 16 pins. > + minItems: 1 > + maxItems: 2 > + > + interrupt-controller: true > + > + "#interrupt-cells": > + const: 2 > + > + clocks: > + description: | > + The clock for clocking the GPIO silicon. Can drop. > + maxItems: 1 > + > + "#gpio-cells": > + const: 2 > + > + gpio-controller: true > + > +required: > + - compatible > + - reg > + - interrupts > + - interrupt-controller > + - "#interrupt-cells" > + - "#gpio-cells" > + - gpio-controller > + > +additionalProperties: false > + > +examples: > + - | > + gpio0: gpio@73f84000 { > + compatible = "fsl,imx35-gpio"; > + reg = <0x73f84000 0x4000>; > + interrupts = <50 51>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > +... > -- > 2.7.4 >