From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Mika Westerberg <mika.westerberg@linux.intel.com>,
linux-gpio@vger.kernel.org,
Linus Walleij <linus.walleij@linaro.org>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Subject: [PATCH v1 1/2] pinctrl: intel: Update description in struct intel_community
Date: Tue, 21 Apr 2020 22:00:48 +0300 [thread overview]
Message-ID: <20200421190049.44888-1-andriy.shevchenko@linux.intel.com> (raw)
It appears that most of the drivers, that are using struct intel_community,
utilize gpps rather than gpp_size. Update comment accordingly.
While here, correct the description of gpp_size, i.e. remove double space
and drop redundant 'etc.' part.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/pinctrl/intel/pinctrl-intel.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h
index 87fc0555ef90e..058bf2b6d9f0e 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.h
+++ b/drivers/pinctrl/intel/pinctrl-intel.h
@@ -94,8 +94,8 @@ enum {
* @ie_offset: Register offset of GPI_IE from @regs.
* @features: Additional features supported by the hardware
* @pin_base: Starting pin of pins in this community
- * @gpp_size: Maximum number of pads in each group, such as PADCFGLOCK,
- * HOSTSW_OWN, GPI_IS, GPI_IE, etc. Used when @gpps is %NULL.
+ * @gpp_size: Maximum number of pads in each group, such as GPI_IS, GPI_IE,
+ * PADCFGLOCK, HOSTSW_OWN. Used when @gpps is %NULL.
* @gpp_num_padown_regs: Number of pad registers each pad group consumes at
* minimum. Use %0 if the number of registers can be
* determined by the size of the group.
@@ -106,8 +106,8 @@ enum {
* @regs: Community specific common registers (reserved for core driver)
* @pad_regs: Community specific pad registers (reserved for core driver)
*
- * Most Intel GPIO host controllers this driver supports each pad group is
- * of equal size (except the last one). In that case the driver can just
+ * In some of Intel GPIO host controllers this driver supports each pad group
+ * is of equal size (except the last one). In that case the driver can just
* fill in @gpp_size field and let the core driver to handle the rest. If
* the controller has pad groups of variable size the client driver can
* pass custom @gpps and @ngpps instead.
--
2.26.1
next reply other threads:[~2020-04-21 19:00 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-21 19:00 Andy Shevchenko [this message]
2020-04-21 19:00 ` [PATCH v1 2/2] pinctrl: intel: Move npins closer to pin_base in struct intel_community Andy Shevchenko
2020-04-22 8:50 ` Mika Westerberg
2020-04-22 9:45 ` Andy Shevchenko
2020-04-22 11:13 ` Andy Shevchenko
2020-04-22 8:49 ` [PATCH v1 1/2] pinctrl: intel: Update description " Mika Westerberg
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