From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Linus Walleij <linus.walleij@linaro.org>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
linux-gpio@vger.kernel.org
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Evan Green <evgreen@chromium.org>
Subject: [PATCH v1] pinctrl: jasperlake: Fix HOSTSW_OWN register offset
Date: Wed, 11 Nov 2020 23:54:01 +0200 [thread overview]
Message-ID: <20201111215401.34449-1-andriy.shevchenko@linux.intel.com> (raw)
Jasper Lake uses different offset for HOSTSW_OWN register.
Fix it here.
Fixes: e278dcb7048b ("pinctrl: intel: Add Intel Jasper Lake pin controller support")
Reported-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
I have got a confirmation that PADCFGLOCK is still 0x80.
I updated my patch and put your name as Reported-by. If you want me
to have your patch instead, I can review it (it needs some massage
of the commit message)
drivers/pinctrl/intel/pinctrl-jasperlake.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/intel/pinctrl-jasperlake.c b/drivers/pinctrl/intel/pinctrl-jasperlake.c
index c5e204c8da9c..ec435b7ab392 100644
--- a/drivers/pinctrl/intel/pinctrl-jasperlake.c
+++ b/drivers/pinctrl/intel/pinctrl-jasperlake.c
@@ -16,7 +16,7 @@
#define JSL_PAD_OWN 0x020
#define JSL_PADCFGLOCK 0x080
-#define JSL_HOSTSW_OWN 0x0b0
+#define JSL_HOSTSW_OWN 0x0c0
#define JSL_GPI_IS 0x100
#define JSL_GPI_IE 0x120
--
2.28.0
next reply other threads:[~2020-11-11 21:54 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-11 21:54 Andy Shevchenko [this message]
2020-11-11 22:07 ` [PATCH v1] pinctrl: jasperlake: Fix HOSTSW_OWN register offset Evan Green
2020-11-11 22:15 ` Andy Shevchenko
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