From: Lars Povlsen <lars.povlsen@microchip.com>
To: Linus Walleij <linus.walleij@linaro.org>, Rob Herring <robh@kernel.org>
Cc: Lars Povlsen <lars.povlsen@microchip.com>,
Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>,
<devicetree@vger.kernel.org>, <linux-gpio@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
Alexandre Belloni <alexandre.belloni@bootlin.com>
Subject: [PATCH -next 2/3] dt-bindings: pinctrl: pinctrl-microchip-sgpio: Add irq support
Date: Wed, 9 Dec 2020 15:27:52 +0100 [thread overview]
Message-ID: <20201209142753.683208-3-lars.povlsen@microchip.com> (raw)
In-Reply-To: <20201209142753.683208-1-lars.povlsen@microchip.com>
This describe the new bindings for the added IRQ support in the
pinctrl-microchip-sgpio driver.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
---
.../bindings/pinctrl/microchip,sparx5-sgpio.yaml | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml b/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml
index 08325bf77a81..df0c83cb1c6e 100644
--- a/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml
@@ -91,6 +91,18 @@ patternProperties:
controlled indirectly by the "ngpios" property: (ngpios/32).
const: 3
+ interrupts:
+ description: Specifies the sgpio IRQ (in parent controller)
+ maxItems: 1
+
+ interrupt-controller: true
+
+ '#interrupt-cells':
+ description:
+ Specifies the pin (port and bit) and flags, as defined in
+ defined in include/dt-bindings/interrupt-controller/irq.h
+ const: 3
+
ngpios:
description: The numbers of GPIO's exposed. This must be a
multiple of 32.
@@ -118,6 +130,7 @@ required:
examples:
- |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
sgpio2: gpio@1101059c {
#address-cells = <1>;
#size-cells = <0>;
@@ -134,6 +147,9 @@ examples:
gpio-controller;
#gpio-cells = <3>;
ngpios = <96>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
};
sgpio_out2: gpio@1 {
compatible = "microchip,sparx5-sgpio-bank";
--
2.25.1
next prev parent reply other threads:[~2020-12-09 14:30 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-09 14:27 [PATCH -next 0/3] pinctrl: pinctrl-microchip-sgpio: Add interrupt controller support Lars Povlsen
2020-12-09 14:27 ` [PATCH -next 1/3] pinctrl: pinctrl-microchip-sgpio: Add irq support (for sparx5) Lars Povlsen
2020-12-11 22:49 ` Linus Walleij
2020-12-09 14:27 ` Lars Povlsen [this message]
2020-12-11 3:31 ` [PATCH -next 2/3] dt-bindings: pinctrl: pinctrl-microchip-sgpio: Add irq support Rob Herring
2020-12-11 22:50 ` Linus Walleij
2020-12-09 14:27 ` [PATCH -next 3/3] arm64: dts: sparx5: Add SGPIO " Lars Povlsen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201209142753.683208-3-lars.povlsen@microchip.com \
--to=lars.povlsen@microchip.com \
--cc=UNGLinuxDriver@microchip.com \
--cc=alexandre.belloni@bootlin.com \
--cc=devicetree@vger.kernel.org \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).