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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id h11sm146837ooj.36.2021.01.12.18.56.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Jan 2021 18:56:28 -0800 (PST) Received: (nullmailer pid 1430607 invoked by uid 1000); Wed, 13 Jan 2021 02:56:27 -0000 Date: Tue, 12 Jan 2021 20:56:27 -0600 From: Rob Herring To: Bjorn Andersson Cc: Vinod Koul , Linus Walleij , linux-arm-msm@vger.kernel.org, Andy Gross , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 1/2] dt-bindings: pinctrl: qcom: Add SM8350 pinctrl bindings Message-ID: <20210113025627.GA1414436@robh.at.kernel.org> References: <20210106054950.303244-1-vkoul@kernel.org> <20210106054950.303244-2-vkoul@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On Thu, Jan 07, 2021 at 11:17:22AM -0600, Bjorn Andersson wrote: > On Tue 05 Jan 23:49 CST 2021, Vinod Koul wrote: > > > Add device tree binding Documentation details for Qualcomm SM8350 > > pinctrl driver. > > > > Signed-off-by: Vinod Koul > > --- > > .../bindings/pinctrl/qcom,sm8350-tlmm.yaml | 149 ++++++++++++++++++ > > 1 file changed, 149 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml > > > > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml > > new file mode 100644 > > index 000000000000..abdafd25bfc2 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml > > @@ -0,0 +1,149 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/pinctrl/qcom,sm8350-tlmm.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Qualcomm Technologies, Inc. SM8350 TLMM block > > + > > +maintainers: > > + - Vinod Koul > > + > > +description: | > > + This binding describes the Top Level Mode Multiplexer block found in the > > + SM8350 platform. > > + > > +properties: > > + compatible: > > + const: qcom,sm8350-tlmm > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 1 > > + > > + interrupt-controller: true > > + > > + '#interrupt-cells': > > + description: Specifies the PIN numbers and Flags, as defined in > > + include/dt-bindings/interrupt-controller/irq.h > > + const: 2 > > + > > + gpio-controller: true > > + > > + '#gpio-cells': > > + description: Specifying the pin number and flags, as defined in > > + include/dt-bindings/gpio/gpio.h > > + const: 2 > > + > > + gpio-ranges: > > + maxItems: 1 > > + > > + gpio-reserved-ranges: > > + maxItems: 1 > > + > > +#PIN CONFIGURATION NODES > > +patternProperties: > > + '-pinmux$': > > I believe that what Rob was asking for was the matter of describing the > mux and config subnodes under this one. But I don't know really how to > express this, because the following are all valid: > > default_state: default-state { > pins = "gpio1"; > bias-disable; > }; > > default_state: default-state { > rx { > pins = "gpio1"; > function = "gpio"; > bias-disable; > }; > }; > > default_state: default-state { > pinmux { > pins = "gpio1"; > function = "gpio"; > }; > > pinconf { > pins = "gpio1"; > bias-disable; > }; > }; > > I.e. the properties described here applies either to this node directly, > or any subnodes (1 level) down. Why!? You can create a definition and reuse it. Something like this: $defs: pin-node: type: object properties: ... patternProperties: '-state$': oneOf: - $ref: #/$defs/pin-node - patternProperties: '.*': $ref: #/$defs/pin-node Rob