From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>
Subject: Re: [PATCH v5 1/2] gpio: Add support for IDT 79RC3243x GPIO controller
Date: Wed, 19 May 2021 08:20:30 +0200 [thread overview]
Message-ID: <20210519062030.GA4308@alpha.franken.de> (raw)
In-Reply-To: <CACRpkdYTor-c2qvE=6YD4A+NmvpLgS3LsOfNpBZ5EdTrDkGgkg@mail.gmail.com>
On Wed, May 19, 2021 at 01:50:39AM +0200, Linus Walleij wrote:
> Hi Thomas,
>
> thanks for your patch!
>
> I can see this is starting to look really good.
>
> There is one thing that confuses me:
>
> On Fri, May 14, 2021 at 2:33 PM Thomas Bogendoerfer
> <tsbogend@alpha.franken.de> wrote:
>
> > IDT 79RC3243x SoCs integrated a gpio controller, which handles up
> > to 32 gpios. All gpios could be used as an interrupt source.
> >
> > Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
> > ---
> > Changes in v5:
> (...)
>
> > +static int idt_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
> > +{
> (...)
> > + /* hardware only supports level triggered */
> > + if (sense == IRQ_TYPE_NONE || (sense & IRQ_TYPE_EDGE_BOTH))
> > + return -EINVAL;
> (...)
> > + irq_set_handler_locked(d, handle_level_irq);
>
> But:
>
> > +static void idt_gpio_ack(struct irq_data *d)
> > +{
> > + struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
> > + struct idt_gpio_ctrl *ctrl = gpiochip_get_data(gc);
> > +
> > + writel(~BIT(d->hwirq), ctrl->gpio + IDT_GPIO_ISTAT);
> > +}
> (...)
> > + .irq_ack = idt_gpio_ack,
>
> Correct me if I'm wrong but I thing .irq_ack() is only called
> from handle_edge_irq ... so never in this case.
handle_level_irq() does a mask_ack_irq() and this uses mask_irq() and
desc->irq_data.chip->irq_ack(), if there is no irq_mask_ack function.
> Can this ACK just be deleted?
no without it interrupts won't go away.
> The code in the ACK callback also looks really weird:
> write all bits except for the current IRQ into the status
> register? It's usually the other way around with these
> things. That really makes me suspect it is unused.
interrupts are acked by writing a 0 to the bit position. I know it's
unusal...
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
next prev parent reply other threads:[~2021-05-19 6:20 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-14 12:33 [PATCH v5 1/2] gpio: Add support for IDT 79RC3243x GPIO controller Thomas Bogendoerfer
2021-05-14 12:33 ` [PATCH v5 2/2] dt-bindings: gpio: Add devicetree binding for IDT 79RC32434 " Thomas Bogendoerfer
2021-05-17 21:11 ` Rob Herring
2021-05-18 23:51 ` Linus Walleij
2021-05-18 23:50 ` [PATCH v5 1/2] gpio: Add support for IDT 79RC3243x " Linus Walleij
2021-05-19 6:20 ` Thomas Bogendoerfer [this message]
2021-06-04 12:22 ` Thomas Bogendoerfer
2021-06-04 22:03 ` Linus Walleij
2021-06-07 14:00 ` Bartosz Golaszewski
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