From: Emil Renner Berthing <kernel@esmil.dk>
To: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org,
linux-serial@vger.kernel.org
Cc: Emil Renner Berthing <kernel@esmil.dk>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Rob Herring <robh+dt@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Linus Walleij <linus.walleij@linaro.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Jiri Slaby <jirislaby@kernel.org>,
Maximilian Luz <luzmaximilian@gmail.com>,
Sagar Kadam <sagar.kadam@sifive.com>,
Drew Fustini <drew@beagleboard.org>,
Geert Uytterhoeven <geert@linux-m68k.org>,
Michael Zhu <michael.zhu@starfivetech.com>,
Fu Wei <tekkamanninja@gmail.com>, Anup Patel <anup.patel@wdc.com>,
Atish Patra <atish.patra@wdc.com>,
Matteo Croce <mcroce@microsoft.com>,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 11/16] dt-bindings: pinctrl: Add StarFive JH7100 bindings
Date: Thu, 21 Oct 2021 19:42:18 +0200 [thread overview]
Message-ID: <20211021174223.43310-12-kernel@esmil.dk> (raw)
In-Reply-To: <20211021174223.43310-1-kernel@esmil.dk>
Add bindings for the StarFive JH7100 GPIO/pin controller.
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
---
.../pinctrl/starfive,jh7100-pinctrl.yaml | 274 ++++++++++++++++++
1 file changed, 274 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml
diff --git a/Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml
new file mode 100644
index 000000000000..342ecd91a3b0
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml
@@ -0,0 +1,274 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/starfive,jh7100-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7100 Pin Controller Device Tree Bindings
+
+maintainers:
+ - Emil Renner Berthing <kernel@esmil.dk>
+ - Drew Fustini <drew@beagleboard.org>
+
+properties:
+ compatible:
+ const: starfive,jh7100-pinctrl
+
+ reg:
+ minItems: 2
+ maxItems: 2
+
+ reg-names:
+ items:
+ - const: "gpio"
+ - const: "padctl"
+
+ clocks:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ gpio-controller: true
+
+ "#gpio-cells":
+ const: 2
+ description: |
+ Number of cells in GPIO specifier. Since the generic GPIO
+ binding is used, the amount of cells must be specified as 2.
+
+ interrupts:
+ maxItems: 1
+ description: The GPIO parent interrupt.
+
+ interrupt-controller: true
+
+ "#interrupt-cells":
+ const: 2
+
+ starfive,signal-group:
+ description: |
+ The SoC has a global setting selecting one of 7 different pinmux
+ configurations of the pads named GPIO[0:63] and FUNC_SHARE[0:141]. After
+ this global setting is chosen only the 64 "GPIO" pins can be further
+ muxed by configuring them to be controlled by certain peripherals rather
+ than software.
+ Note that in configuration 0 none of GPIOs are routed to pads, and only
+ in configuration 1 are the GPIOs routed to the pads named GPIO[0:63].
+ If this property is not set it defaults to the configuration already
+ chosen by the earlier boot stages.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 1, 2, 3, 4, 5, 6]
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - gpio-controller
+ - "#gpio-cells"
+ - interrupts
+ - interrupt-controller
+ - "#interrupt-cells"
+
+patternProperties:
+ '-[0-9]*$':
+ type: object
+ patternProperties:
+ '-pins*$':
+ type: object
+ description: |
+ A pinctrl node should contain at least one subnode representing the
+ pinctrl groups available on the machine. Each subnode will list the
+ pins it needs, and how they should be configured, with regard to
+ muxer configuration, bias, input enable/disable, input schmitt
+ trigger enable/disable, slew-rate and drive strength.
+ $ref: "/schemas/pinctrl/pincfg-node.yaml"
+
+ properties:
+ pins:
+ description: |
+ The list of pin identifiers that properties in the node apply to.
+ This should be set using either the PAD_GPIO or PAD_FUNC_SHARE
+ macro. Either this or "pinmux" has to be specified.
+
+ pinmux:
+ description: |
+ The list of GPIO identifiers and their mux settings that
+ properties in the node apply to. This should be set using the
+ GPIOMUX macro. Either this or "pins" has to be specified.
+
+ bias-disable: true
+
+ bias-pull-up:
+ type: boolean
+
+ bias-pull-down:
+ type: boolean
+
+ drive-strength:
+ enum: [ 14, 21, 28, 35, 42, 49, 56, 63 ]
+
+ input-enable: true
+
+ input-disable: true
+
+ input-schmitt-enable: true
+
+ input-schmitt-disable: true
+
+ slew-rate:
+ maximum: 7
+
+ starfive,strong-pull-up:
+ description: enable strong pull-up.
+ type: boolean
+
+ additionalProperties: false
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/starfive-jh7100.h>
+ #include <dt-bindings/reset/starfive-jh7100.h>
+ #include <dt-bindings/pinctrl/pinctrl-starfive.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ gpio: pinctrl@11910000 {
+ compatible = "starfive,jh7100-pinctrl";
+ reg = <0x0 0x11910000 0x0 0x10000>,
+ <0x0 0x11858000 0x0 0x1000>;
+ reg-names = "gpio", "padctl";
+ clocks = <&clkgen JH7100_CLK_GPIO_APB>;
+ resets = <&clkgen JH7100_RSTN_GPIO_APB>;
+ interrupts = <32>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ starfive,signal-group = <6>;
+
+ gmac_pins_default: gmac-0 {
+ gtxclk-pins {
+ pins = <PAD_FUNC_SHARE(115)>;
+ bias-pull-up;
+ drive-strength = <35>;
+ input-enable;
+ input-schmitt-enable;
+ slew-rate = <0>;
+ };
+ miitxclk-pins {
+ pins = <PAD_FUNC_SHARE(116)>;
+ bias-pull-up;
+ drive-strength = <14>;
+ input-enable;
+ input-schmitt-disable;
+ slew-rate = <0>;
+ };
+ tx-pins {
+ pins = <PAD_FUNC_SHARE(117)>,
+ <PAD_FUNC_SHARE(119)>,
+ <PAD_FUNC_SHARE(120)>,
+ <PAD_FUNC_SHARE(121)>,
+ <PAD_FUNC_SHARE(122)>,
+ <PAD_FUNC_SHARE(123)>,
+ <PAD_FUNC_SHARE(124)>,
+ <PAD_FUNC_SHARE(125)>,
+ <PAD_FUNC_SHARE(126)>;
+ bias-disable;
+ drive-strength = <35>;
+ input-disable;
+ input-schmitt-disable;
+ slew-rate = <0>;
+ };
+ rxclk-pins {
+ pins = <PAD_FUNC_SHARE(127)>;
+ bias-pull-up;
+ drive-strength = <14>;
+ input-enable;
+ input-schmitt-disable;
+ slew-rate = <6>;
+ };
+ rxer-pins {
+ pins = <PAD_FUNC_SHARE(129)>;
+ bias-pull-up;
+ drive-strength = <14>;
+ input-enable;
+ input-schmitt-disable;
+ slew-rate = <0>;
+ };
+ rx-pins {
+ pins = <PAD_FUNC_SHARE(128)>,
+ <PAD_FUNC_SHARE(130)>,
+ <PAD_FUNC_SHARE(131)>,
+ <PAD_FUNC_SHARE(132)>,
+ <PAD_FUNC_SHARE(133)>,
+ <PAD_FUNC_SHARE(134)>,
+ <PAD_FUNC_SHARE(135)>,
+ <PAD_FUNC_SHARE(136)>,
+ <PAD_FUNC_SHARE(137)>,
+ <PAD_FUNC_SHARE(138)>,
+ <PAD_FUNC_SHARE(139)>,
+ <PAD_FUNC_SHARE(140)>,
+ <PAD_FUNC_SHARE(141)>;
+ bias-pull-up;
+ drive-strength = <14>;
+ input-enable;
+ input-schmitt-enable;
+ slew-rate = <0>;
+ };
+ };
+
+ i2c0_pins_default: i2c0-0 {
+ i2c-pins {
+ pinmux = <GPIOMUX(62, GPO_LOW,
+ GPO_I2C0_PAD_SCK_OEN,
+ GPI_I2C0_PAD_SCK_IN)>,
+ <GPIOMUX(61, GPO_LOW,
+ GPO_I2C0_PAD_SDA_OEN,
+ GPI_I2C0_PAD_SDA_IN)>;
+ bias-disable; /* external pull-up */
+ input-enable;
+ input-schmitt-enable;
+ };
+ };
+
+ uart3_pins_default: uart3-0 {
+ rx-pin {
+ pinmux = <GPIOMUX(13, GPO_LOW, GPO_DISABLE,
+ GPI_UART3_PAD_SIN)>;
+ bias-pull-up;
+ input-enable;
+ input-schmitt-enable;
+ };
+ tx-pin {
+ pinmux = <GPIOMUX(14, GPO_UART3_PAD_SOUT,
+ GPO_ENABLE, GPI_NONE)>;
+ bias-disable;
+ input-disable;
+ input-schmitt-disable;
+ };
+ };
+ };
+
+ gmac {
+ pinctrl-0 = <&gmac_pins_default>;
+ pinctrl-names = "default";
+ };
+
+ i2c0 {
+ pinctrl-0 = <&i2c0_pins_default>;
+ pinctrl-names = "default";
+ };
+
+ uart3 {
+ pinctrl-0 = <&uart3_pins_default>;
+ pinctrl-names = "default";
+ };
+ };
+
+...
--
2.33.1
next prev parent reply other threads:[~2021-10-21 17:43 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-21 17:42 [PATCH v2 00/16] Basic StarFive JH7100 RISC-V SoC support Emil Renner Berthing
2021-10-21 17:42 ` [PATCH v2 01/16] RISC-V: Add StarFive SoC Kconfig option Emil Renner Berthing
2021-10-22 8:50 ` Andy Shevchenko
2021-10-22 9:40 ` Emil Renner Berthing
2021-10-22 12:40 ` Andy Shevchenko
2021-10-21 17:42 ` [PATCH v2 02/16] dt-bindings: timer: Add StarFive JH7100 clint Emil Renner Berthing
2021-10-21 17:42 ` [PATCH v2 03/16] dt-bindings: interrupt-controller: Add StarFive JH7100 plic Emil Renner Berthing
2021-10-29 1:37 ` Rob Herring
2021-10-21 17:42 ` [PATCH v2 04/16] dt-bindings: clock: starfive: Add JH7100 clock definitions Emil Renner Berthing
2021-10-29 1:42 ` Rob Herring
2021-10-21 17:42 ` [PATCH v2 05/16] dt-bindings: clock: starfive: Add JH7100 bindings Emil Renner Berthing
2021-10-29 1:42 ` Rob Herring
2021-10-29 13:05 ` Emil Renner Berthing
2021-10-21 17:42 ` [PATCH v2 06/16] clk: starfive: Add JH7100 clock generator driver Emil Renner Berthing
2021-10-22 12:33 ` Andy Shevchenko
2021-10-22 12:44 ` Geert Uytterhoeven
2021-10-22 13:13 ` Emil Renner Berthing
2021-10-22 13:35 ` Andy Shevchenko
2021-10-26 20:19 ` Stephen Boyd
2021-10-26 22:35 ` Emil Renner Berthing
2021-10-27 0:54 ` Stephen Boyd
2021-10-27 9:30 ` Andy Shevchenko
2021-10-27 10:24 ` Emil Renner Berthing
2021-10-27 10:32 ` Andy Shevchenko
2021-10-27 11:22 ` Heiko Stübner
2021-10-21 17:42 ` [PATCH v2 07/16] dt-bindings: reset: Add StarFive JH7100 reset definitions Emil Renner Berthing
2021-10-29 1:42 ` Rob Herring
2021-10-21 17:42 ` [PATCH v2 08/16] dt-bindings: reset: Add Starfive JH7100 reset bindings Emil Renner Berthing
2021-10-29 1:43 ` Rob Herring
2021-10-21 17:42 ` [PATCH v2 09/16] reset: starfive-jh7100: Add StarFive JH7100 reset driver Emil Renner Berthing
2021-10-22 12:55 ` Andy Shevchenko
2021-10-22 13:34 ` Emil Renner Berthing
2021-10-22 13:38 ` Andy Shevchenko
2021-10-22 13:50 ` Emil Renner Berthing
2021-10-22 13:56 ` Andy Shevchenko
2021-10-22 14:25 ` Emil Renner Berthing
2021-10-22 14:49 ` Andy Shevchenko
2021-10-22 14:50 ` Andy Shevchenko
2021-10-22 14:56 ` Emil Renner Berthing
2021-10-22 15:24 ` Andy Shevchenko
2021-10-22 15:36 ` Emil Renner Berthing
2021-10-22 15:54 ` Andy Shevchenko
2021-10-22 15:59 ` Emil Renner Berthing
2021-10-22 13:06 ` Andreas Schwab
2021-10-22 13:41 ` Emil Renner Berthing
2021-10-21 17:42 ` [PATCH v2 10/16] dt-bindings: pinctrl: Add StarFive pinctrl definitions Emil Renner Berthing
2021-10-29 1:44 ` Rob Herring
2021-10-21 17:42 ` Emil Renner Berthing [this message]
2021-10-24 23:11 ` [PATCH v2 11/16] dt-bindings: pinctrl: Add StarFive JH7100 bindings Linus Walleij
2021-10-25 0:35 ` Emil Renner Berthing
2021-10-29 1:50 ` Rob Herring
2021-10-29 13:00 ` Emil Renner Berthing
2021-10-29 14:44 ` Rob Herring
2021-10-21 17:42 ` [PATCH v2 12/16] pinctrl: starfive: Add pinctrl driver for StarFive SoCs Emil Renner Berthing
2021-10-21 19:01 ` Drew Fustini
2021-10-21 19:50 ` Emil Renner Berthing
2021-10-22 2:06 ` Drew Fustini
2021-10-22 13:31 ` Andy Shevchenko
2021-10-23 18:45 ` Emil Renner Berthing
2021-10-23 20:28 ` Andy Shevchenko
2021-10-23 21:02 ` Emil Renner Berthing
2021-10-24 9:29 ` Emil Renner Berthing
2021-10-25 10:15 ` Andy Shevchenko
2021-10-25 10:24 ` Emil Renner Berthing
2021-10-25 10:51 ` Andy Shevchenko
2021-10-28 20:17 ` kernel test robot
2021-10-21 17:42 ` [PATCH v2 13/16] dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts Emil Renner Berthing
2021-10-29 1:50 ` Rob Herring
2021-10-21 17:42 ` [PATCH v2 14/16] serial: 8250_dw: Add skip_clk_set_rate quirk Emil Renner Berthing
2021-10-21 17:42 ` [PATCH v2 15/16] RISC-V: Add initial StarFive JH7100 device tree Emil Renner Berthing
2021-10-21 17:42 ` [PATCH v2 16/16] RISC-V: Add BeagleV Starlight Beta " Emil Renner Berthing
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