From: Herve Codina <herve.codina@bootlin.com>
To: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Viresh Kumar <vireshk@kernel.org>,
Shiraz Hashim <shiraz.linux.kernel@gmail.com>,
soc@kernel.org, Rob Herring <robh+dt@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>,
Linus Walleij <linus.walleij@linaro.org>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH 0/6] spear: Fix SPEAr3XX plgpio support
Date: Thu, 2 Dec 2021 12:48:55 +0100 [thread overview]
Message-ID: <20211202124855.1c1298e7@bootlin.com> (raw)
In-Reply-To: <20211202112700.mkjmwibabj2cpr6u@vireshk-i7>
On Thu, 2 Dec 2021 16:57:00 +0530
Viresh Kumar <viresh.kumar@linaro.org> wrote:
> On 02-12-21, 10:52, Herve Codina wrote:
> > Hi,
> >
> > This patch series fixes the plgpio support on SPEAr3xx SOCs.
> >
> > The first four patches of this series fixes a ressources
> > sharing issue between the plgpio driver and the pinmux
> > driver.
> > Indeed, these two drivers can use the same IO address range
> > on some SPEAr3xx SOCs.
> > To solve the issue, a regmap (syscon managed) is used in both
> > drivers and the plgpio driver can reference the pinmux regmap
> > to use it.
> >
> > The second part of this series is related to IRQs.
> > The plgpio on SPEAr320s SOC uses an IRQ line in the reserve
> > range (from SPEAr320 point of view).
> > This issue is fixed enabling all the 'reserved' IRQs and
> > adding a dtsi file for the SPEAr320s with the correct interrupt
> > for the plgpio node.
>
> Are these changes backwards compatible ? I mean new kernel will work
> with old DTBs ? It may be quite important to not break that here.
>
Yes they are.
- the regmap reference (phandle) is optional.
- The IRQ for plgpio is used only on the new spear320s.dtsi.
I have not seen any issues on my board (spear320s SOC) when I only add support
for the 'reserved' IRQs (ie no spurious interrupts occur when I apply the patch
related to shirq).
I cannot test on SPEAr320 SOC as I haven't got any board with this SOC.
Herve
--
Hervé Codina, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
next prev parent reply other threads:[~2021-12-02 11:49 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-02 9:52 [PATCH 0/6] spear: Fix SPEAr3XX plgpio support Herve Codina
2021-12-02 9:52 ` [PATCH 1/6] pinctrl: spear: spear: Convert to regmap Herve Codina
2021-12-02 9:52 ` [PATCH 2/6] pinctrl: spear: plgpio: " Herve Codina
2021-12-02 9:52 ` [PATCH 3/6] pinctrl: spear: plgpio: Introduce regmap phandle Herve Codina
2021-12-02 9:52 ` [PATCH 4/6] ARM: dts: spear3xx: Use plgpio regmap in SPEAr310 and SPEAr320 Herve Codina
2021-12-02 9:52 ` [PATCH 5/6] irq: spear-shirq: Add support for IRQ 0..6 Herve Codina
2021-12-04 23:37 ` Linus Walleij
2021-12-13 16:29 ` Arnd Bergmann
2021-12-02 9:52 ` [PATCH 6/6] ARM: dts: spear3xx: Add spear320s dtsi Herve Codina
2021-12-02 11:27 ` [PATCH 0/6] spear: Fix SPEAr3XX plgpio support Viresh Kumar
2021-12-02 11:48 ` Herve Codina [this message]
2021-12-03 4:43 ` Viresh Kumar
2021-12-04 23:36 ` Linus Walleij
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