From: Schspa Shi <schspa@gmail.com>
To: andy.shevchenko@gmail.com
Cc: brgl@bgdev.pl, f.fainelli@gmail.com, fancer.lancer@gmail.com,
hoan@os.amperecomputing.com, linus.walleij@linaro.org,
linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org,
linux-kernel@vger.kernel.org, opendmb@gmail.com,
schspa@gmail.com
Subject: [PATCH v2 11/15] gpio: grgpio: use raw lock for bgpio_lock
Date: Mon, 18 Apr 2022 00:52:04 +0800 [thread overview]
Message-ID: <20220417165208.39754-11-schspa@gmail.com> (raw)
In-Reply-To: <20220417165208.39754-1-schspa@gmail.com>
bgpio_lock is changed to raw lock, fellow the header change
Signed-off-by: Schspa Shi <schspa@gmail.com>
---
drivers/gpio/gpio-grgpio.c | 30 +++++++++++++++---------------
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/gpio/gpio-grgpio.c b/drivers/gpio/gpio-grgpio.c
index 23d447e17a67..df563616f943 100644
--- a/drivers/gpio/gpio-grgpio.c
+++ b/drivers/gpio/gpio-grgpio.c
@@ -145,7 +145,7 @@ static int grgpio_irq_set_type(struct irq_data *d, unsigned int type)
return -EINVAL;
}
- spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
+ raw_spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
ipol = priv->gc.read_reg(priv->regs + GRGPIO_IPOL) & ~mask;
iedge = priv->gc.read_reg(priv->regs + GRGPIO_IEDGE) & ~mask;
@@ -153,7 +153,7 @@ static int grgpio_irq_set_type(struct irq_data *d, unsigned int type)
priv->gc.write_reg(priv->regs + GRGPIO_IPOL, ipol | pol);
priv->gc.write_reg(priv->regs + GRGPIO_IEDGE, iedge | edge);
- spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
+ raw_spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
return 0;
}
@@ -164,11 +164,11 @@ static void grgpio_irq_mask(struct irq_data *d)
int offset = d->hwirq;
unsigned long flags;
- spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
+ raw_spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
grgpio_set_imask(priv, offset, 0);
- spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
+ raw_spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
}
static void grgpio_irq_unmask(struct irq_data *d)
@@ -177,11 +177,11 @@ static void grgpio_irq_unmask(struct irq_data *d)
int offset = d->hwirq;
unsigned long flags;
- spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
+ raw_spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
grgpio_set_imask(priv, offset, 1);
- spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
+ raw_spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
}
static struct irq_chip grgpio_irq_chip = {
@@ -199,7 +199,7 @@ static irqreturn_t grgpio_irq_handler(int irq, void *dev)
int i;
int match = 0;
- spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
+ raw_spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
/*
* For each gpio line, call its interrupt handler if it its underlying
@@ -215,7 +215,7 @@ static irqreturn_t grgpio_irq_handler(int irq, void *dev)
}
}
- spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
+ raw_spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
if (!match)
dev_warn(priv->dev, "No gpio line matched irq %d\n", irq);
@@ -247,13 +247,13 @@ static int grgpio_irq_map(struct irq_domain *d, unsigned int irq,
dev_dbg(priv->dev, "Mapping irq %d for gpio line %d\n",
irq, offset);
- spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
+ raw_spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
/* Request underlying irq if not already requested */
lirq->irq = irq;
uirq = &priv->uirqs[lirq->index];
if (uirq->refcnt == 0) {
- spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
+ raw_spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
ret = request_irq(uirq->uirq, grgpio_irq_handler, 0,
dev_name(priv->dev), priv);
if (ret) {
@@ -262,11 +262,11 @@ static int grgpio_irq_map(struct irq_domain *d, unsigned int irq,
uirq->uirq);
return ret;
}
- spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
+ raw_spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
}
uirq->refcnt++;
- spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
+ raw_spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
/* Setup irq */
irq_set_chip_data(irq, priv);
@@ -290,7 +290,7 @@ static void grgpio_irq_unmap(struct irq_domain *d, unsigned int irq)
irq_set_chip_and_handler(irq, NULL, NULL);
irq_set_chip_data(irq, NULL);
- spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
+ raw_spin_lock_irqsave(&priv->gc.bgpio_lock, flags);
/* Free underlying irq if last user unmapped */
index = -1;
@@ -309,13 +309,13 @@ static void grgpio_irq_unmap(struct irq_domain *d, unsigned int irq)
uirq = &priv->uirqs[lirq->index];
uirq->refcnt--;
if (uirq->refcnt == 0) {
- spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
+ raw_spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
free_irq(uirq->uirq, priv);
return;
}
}
- spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
+ raw_spin_unlock_irqrestore(&priv->gc.bgpio_lock, flags);
}
static const struct irq_domain_ops grgpio_irq_domain_ops = {
--
2.24.3 (Apple Git-128)
next prev parent reply other threads:[~2022-04-17 16:54 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-15 16:55 [PATCH] gpio: use raw spinlock for gpio chip shadowed data Schspa Shi
2022-04-16 8:30 ` Andy Shevchenko
2022-04-17 16:51 ` [PATCH v2 01/15] " Schspa Shi
2022-04-17 16:51 ` [PATCH v2 02/15] pinctrl: nuvoton: npcm7xx: use raw_spin_lock_irqsave for bgpio_lock Schspa Shi
2022-04-17 16:51 ` [PATCH v2 03/15] gpio: tb10x: use raw lock " Schspa Shi
2022-04-17 16:51 ` [PATCH v2 04/15] gpio: sifive: " Schspa Shi
2022-04-17 16:51 ` [PATCH v2 05/15] gpio: mlxbf2: " Schspa Shi
2022-04-17 16:51 ` [PATCH v2 06/15] gpio: menz127: " Schspa Shi
2022-04-17 16:52 ` [PATCH v2 07/15] gpio: loongson1: " Schspa Shi
2022-04-17 16:52 ` [PATCH v2 08/15] gpio: ixp4xx: " Schspa Shi
2022-04-17 16:52 ` [PATCH v2 09/15] gpio: idt3243x: " Schspa Shi
2022-04-17 16:52 ` [PATCH v2 10/15] gpio: hlwd: " Schspa Shi
2022-04-17 16:52 ` Schspa Shi [this message]
2022-04-17 16:52 ` [PATCH v2 12/15] gpio: dwapb: " Schspa Shi
2022-04-17 16:52 ` [PATCH v2 13/15] gpio: cadence: " Schspa Shi
2022-04-17 16:52 ` [PATCH v2 14/15] gpio: brcmstb: " Schspa Shi
2022-04-17 16:52 ` [PATCH v2 15/15] gpio: amdpt: " Schspa Shi
[not found] ` <CAHp75Vc8HwheQVOpcn_Lxk-bOOMLybr=m6OdO7mJ-vE9xywBLg@mail.gmail.com>
2022-04-18 3:07 ` [PATCH] gpio: use raw spinlock for gpio chip shadowed data Schspa Shi
2022-04-18 11:38 ` Andy Shevchenko
2022-04-18 11:39 ` Andy Shevchenko
2022-04-18 15:43 ` Schspa Shi
2022-04-18 19:01 ` Bartosz Golaszewski
2022-04-19 1:28 ` [PATCH v3] " Schspa Shi
2022-04-19 8:22 ` Andy Shevchenko
2022-04-19 21:57 ` Linus Walleij
2022-04-19 22:30 ` Doug Berger
2022-04-20 9:37 ` Serge Semin
2022-04-25 10:15 ` Bartosz Golaszewski
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