From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>,
Andy Shevchenko <andy@kernel.org>,
Linus Walleij <linus.walleij@linaro.org>
Subject: [PATCH v1 4/7] pinctrl: lynxpoint: Switch to to embedded struct pingroup
Date: Mon, 20 Jun 2022 14:44:36 +0300 [thread overview]
Message-ID: <20220620114439.31491-4-andriy.shevchenko@linux.intel.com> (raw)
In-Reply-To: <20220620114439.31491-1-andriy.shevchenko@linux.intel.com>
Since struct intel_pingroup got a new member, switch the driver to use it.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/pinctrl/intel/pinctrl-lynxpoint.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/pinctrl/intel/pinctrl-lynxpoint.c b/drivers/pinctrl/intel/pinctrl-lynxpoint.c
index 4fb39eb30902..5d1abee30f8f 100644
--- a/drivers/pinctrl/intel/pinctrl-lynxpoint.c
+++ b/drivers/pinctrl/intel/pinctrl-lynxpoint.c
@@ -282,7 +282,7 @@ static const char *lp_get_group_name(struct pinctrl_dev *pctldev,
{
struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
- return lg->soc->groups[selector].name;
+ return lg->soc->groups[selector].grp.name;
}
static int lp_get_group_pins(struct pinctrl_dev *pctldev,
@@ -292,8 +292,8 @@ static int lp_get_group_pins(struct pinctrl_dev *pctldev,
{
struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
- *pins = lg->soc->groups[selector].pins;
- *num_pins = lg->soc->groups[selector].npins;
+ *pins = lg->soc->groups[selector].grp.pins;
+ *num_pins = lg->soc->groups[selector].grp.npins;
return 0;
}
@@ -366,8 +366,8 @@ static int lp_pinmux_set_mux(struct pinctrl_dev *pctldev,
raw_spin_lock_irqsave(&lg->lock, flags);
/* Now enable the mux setting for each pin in the group */
- for (i = 0; i < grp->npins; i++) {
- void __iomem *reg = lp_gpio_reg(&lg->chip, grp->pins[i], LP_CONFIG1);
+ for (i = 0; i < grp->grp.npins; i++) {
+ void __iomem *reg = lp_gpio_reg(&lg->chip, grp->grp.pins[i], LP_CONFIG1);
u32 value;
value = ioread32(reg);
--
2.35.1
next prev parent reply other threads:[~2022-06-20 11:44 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-20 11:44 [PATCH v1 1/7] pinctrl: intel: Embed struct pingroup into struct intel_pingroup Andy Shevchenko
2022-06-20 11:44 ` [PATCH v1 2/7] pinctrl: baytrail: Switch to to embedded struct pingroup Andy Shevchenko
2022-06-20 11:44 ` [PATCH v1 3/7] pinctrl: cherryview: " Andy Shevchenko
2022-06-20 11:44 ` Andy Shevchenko [this message]
2022-06-20 11:44 ` [PATCH v1 5/7] pinctrl: merrifield: " Andy Shevchenko
2022-06-20 11:44 ` [PATCH v1 6/7] pinctrl: intel: " Andy Shevchenko
2022-06-20 11:44 ` [PATCH v1 7/7] pinctrl: intel: Drop no more used members of struct intel_pingroup Andy Shevchenko
2022-06-20 13:01 ` [PATCH v1 1/7] pinctrl: intel: Embed struct pingroup into " Mika Westerberg
2022-06-20 15:46 ` Andy Shevchenko
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