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From: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
To: broonie@kernel.org
Cc: agross@kernel.org, bjorn.andersson@linaro.org,
	srinivas.kandagatla@linaro.org, bgoswami@codeaurora.org,
	gregkh@linuxfoundation.org, rafael@kernel.org,
	cw00.choi@samsung.com, krzysztof.kozlowski@linaro.org,
	b.zolnierkie@samsung.com, myungjoo.ham@samsung.com,
	michael@walle.cc, linus.walleij@linaro.org, brgl@bgdev.pl,
	tglx@linutronix.de, maz@kernel.org, lee.jones@linaro.org,
	mani@kernel.org, cristian.ciocaltea@gmail.com, wens@csie.org,
	tharvey@gateworks.com, rjones@gateworks.com,
	mazziesaccount@gmail.com, orsonzhai@gmail.com,
	baolin.wang7@gmail.com, zhang.lyra@gmail.com,
	jernej.skrabec@gmail.com, samuel@sholland.org,
	lgirdwood@gmail.com, perex@perex.cz, tiwai@suse.com,
	linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
	linux-actions@lists.infradead.org, linux-arm-msm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-sunxi@lists.linux.dev, alsa-devel@alsa-project.org
Subject: [PATCH 04/49] regmap-irq: Introduce config registers for irq types
Date: Mon, 20 Jun 2022 21:05:59 +0100	[thread overview]
Message-ID: <20220620200644.1961936-5-aidanmacdonald.0x0@gmail.com> (raw)
In-Reply-To: <20220620200644.1961936-1-aidanmacdonald.0x0@gmail.com>

Config registers provide a more uniform approach to handling irq type
registers. They are essentially an extension of the virtual registers
used by the qcom-pm8008 driver.

Config registers can be represented as a 2D array:

    config_base[0]      reg0,0      reg0,1      reg0,2      reg0,3
    config_base[1]      reg1,0      reg1,1      reg1,2      reg1,3
    config_base[2]      reg2,0      reg2,1      reg2,2      reg2,3

There are 'num_config_bases' base registers, each of which is used to
address 'num_config_regs' registers. The addresses are calculated in
the same way as for other bases. It is assumed that an irq's type is
controlled by one column of registers; that column is identified by
the irq's 'type_reg_offset'.

The set_type_config() callback is responsible for updating the config
register contents. It receives an array of buffers (each represents a
row of registers) and the index of the column to update, along with
the 'struct regmap_irq' description and requested irq type.

Buffered values are written to registers in regmap_irq_sync_unlock().
Note that the entire register contents are overwritten, which is a
minor change in behavior from type registers via 'type_base'.

Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
---
 drivers/base/regmap/regmap-irq.c | 102 ++++++++++++++++++++++++++++++-
 include/linux/regmap.h           |  12 ++++
 2 files changed, 113 insertions(+), 1 deletion(-)

diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c
index 59cfd4000e63..be35f2e41b8c 100644
--- a/drivers/base/regmap/regmap-irq.c
+++ b/drivers/base/regmap/regmap-irq.c
@@ -39,6 +39,7 @@ struct regmap_irq_chip_data {
 	unsigned int *type_buf;
 	unsigned int *type_buf_def;
 	unsigned int **virt_buf;
+	unsigned int **config_buf;
 
 	unsigned int irq_reg_stride;
 	unsigned int type_reg_stride;
@@ -231,6 +232,17 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
 		}
 	}
 
+	for (i = 0; i < d->chip->num_config_bases; i++) {
+		for (j = 0; j < d->chip->num_config_regs; j++) {
+			reg = sub_irq_reg(d, d->chip->config_base[i], j);
+			ret = regmap_write(map, reg, d->config_buf[i][j]);
+			if (ret != 0)
+				dev_err(d->map->dev,
+					"Failed to write config %x: %d\n",
+					reg, ret);
+		}
+	}
+
 	if (d->chip->runtime_pm)
 		pm_runtime_put(map->dev);
 
@@ -298,6 +310,10 @@ static int regmap_irq_set_type(struct irq_data *data, unsigned int type)
 
 	reg = t->type_reg_offset / map->reg_stride;
 
+	if (d->chip->set_type_config)
+		return d->chip->set_type_config(d->config_buf, type,
+						irq_data, reg);
+
 	if (t->type_reg_mask)
 		d->type_buf[reg] &= ~t->type_reg_mask;
 	else
@@ -603,6 +619,62 @@ static const struct irq_domain_ops regmap_domain_ops = {
 	.xlate	= irq_domain_xlate_onetwocell,
 };
 
+/**
+ * regmap_irq_set_type_config_simple() - Simple IRQ type configuration callback.
+ *
+ * @buf: Buffer containing configuration register values, this is a 2D array of
+ *       `num_config_bases` rows, each of `num_config_regs` elements.
+ * @type: The requested IRQ type.
+ * @irq_data: The IRQ being configured.
+ * @idx: Index of the irq's config registers within each array `buf[i]`
+ *
+ * This is a &struct regmap_irq_chip->set_type_config callback suitable for
+ * chips with one config register. Register values are updated according to
+ * the &struct regmap_irq_type data associated with an IRQ.
+ */
+int regmap_irq_set_type_config_simple(unsigned int **buf, unsigned int type,
+				      const struct regmap_irq *irq_data, int idx)
+{
+	const struct regmap_irq_type *t = &irq_data->type;
+
+	if (t->type_reg_mask)
+		buf[0][idx] &= ~t->type_reg_mask;
+	else
+		buf[0][idx] &= ~(t->type_falling_val |
+				 t->type_rising_val |
+				 t->type_level_low_val |
+				 t->type_level_high_val);
+
+	switch (type) {
+	case IRQ_TYPE_EDGE_FALLING:
+		buf[0][idx] |= t->type_falling_val;
+		break;
+
+	case IRQ_TYPE_EDGE_RISING:
+		buf[0][idx] |= t->type_rising_val;
+		break;
+
+	case IRQ_TYPE_EDGE_BOTH:
+		buf[0][idx] |= (t->type_falling_val |
+				t->type_rising_val);
+		break;
+
+	case IRQ_TYPE_LEVEL_HIGH:
+		buf[0][idx] |= t->type_level_high_val;
+		break;
+
+	case IRQ_TYPE_LEVEL_LOW:
+		buf[0][idx] |= t->type_level_low_val;
+		break;
+
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(regmap_irq_set_type_config_simple);
+
 /**
  * regmap_add_irq_chip_fwnode() - Use standard regmap IRQ controller handling
  *
@@ -728,6 +800,24 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
 		}
 	}
 
+	if (chip->num_config_bases && chip->num_config_regs) {
+		/*
+		 * Create config_buf[num_config_bases][num_config_regs]
+		 */
+		d->config_buf = kcalloc(chip->num_config_bases,
+					sizeof(*d->config_buf), GFP_KERNEL);
+		if (!d->config_buf)
+			goto err_alloc;
+
+		for (i = 0; i < chip->num_config_regs; i++) {
+			d->config_buf[i] = kcalloc(chip->num_config_regs,
+						   sizeof(unsigned int),
+						   GFP_KERNEL);
+			if (!d->config_buf[i])
+				goto err_alloc;
+		}
+	}
+
 	d->irq_chip = regmap_irq_chip;
 	d->irq_chip.name = chip->name;
 	d->irq = irq;
@@ -904,6 +994,11 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
 			kfree(d->virt_buf[i]);
 		kfree(d->virt_buf);
 	}
+	if (d->config_buf) {
+		for (i = 0; i < chip->num_config_bases; i++)
+			kfree(d->config_buf[i]);
+		kfree(d->config_buf);
+	}
 	kfree(d);
 	return ret;
 }
@@ -944,7 +1039,7 @@ EXPORT_SYMBOL_GPL(regmap_add_irq_chip);
 void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)
 {
 	unsigned int virq;
-	int hwirq;
+	int i, hwirq;
 
 	if (!d)
 		return;
@@ -974,6 +1069,11 @@ void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)
 	kfree(d->mask_buf);
 	kfree(d->status_reg_buf);
 	kfree(d->status_buf);
+	if (d->config_buf) {
+		for (i = 0; i < d->chip->num_config_bases; i++)
+			kfree(d->config_buf[i]);
+		kfree(d->config_buf);
+	}
 	kfree(d);
 }
 EXPORT_SYMBOL_GPL(regmap_del_irq_chip);
diff --git a/include/linux/regmap.h b/include/linux/regmap.h
index 8952fa3d0d59..e48d65756fb4 100644
--- a/include/linux/regmap.h
+++ b/include/linux/regmap.h
@@ -1460,6 +1460,7 @@ struct regmap_irq_sub_irq_map {
  * @wake_base:   Base address for wake enables.  If zero unsupported.
  * @type_base:   Base address for irq type.  If zero unsupported.
  * @virt_reg_base:   Base addresses for extra config regs.
+ * @config_base: Base address for IRQ type config regs. If null unsupported.
  * @irq_reg_stride:  Stride to use for chips where registers are not contiguous.
  * @init_ack_masked: Ack all masked interrupts once during initalization.
  * @mask_invert: Inverted mask register: cleared bits are masked out.
@@ -1489,12 +1490,15 @@ struct regmap_irq_sub_irq_map {
  *		     If zero unsupported.
  * @type_reg_stride: Stride to use for chips where type registers are not
  *			contiguous.
+ * @num_config_bases:	Number of config base registers.
+ * @num_config_regs:	Number of config registers for each config base register.
  * @handle_pre_irq:  Driver specific callback to handle interrupt from device
  *		     before regmap_irq_handler process the interrupts.
  * @handle_post_irq: Driver specific callback to handle interrupt from device
  *		     after handling the interrupts in regmap_irq_handler().
  * @set_type_virt:   Driver specific callback to extend regmap_irq_set_type()
  *		     and configure virt regs.
+ * @set_type_config: Callback used for configuring irq types.
  * @irq_drv_data:    Driver specific IRQ data which is passed as parameter when
  *		     driver specific pre/post interrupt handler is called.
  *
@@ -1517,6 +1521,7 @@ struct regmap_irq_chip {
 	unsigned int wake_base;
 	unsigned int type_base;
 	unsigned int *virt_reg_base;
+	const unsigned int *config_base;
 	unsigned int irq_reg_stride;
 	bool mask_writeonly:1;
 	bool init_ack_masked:1;
@@ -1539,17 +1544,24 @@ struct regmap_irq_chip {
 
 	int num_type_reg;
 	int num_virt_regs;
+	int num_config_bases;
+	int num_config_regs;
 	unsigned int type_reg_stride;
 
 	int (*handle_pre_irq)(void *irq_drv_data);
 	int (*handle_post_irq)(void *irq_drv_data);
 	int (*set_type_virt)(unsigned int **buf, unsigned int type,
 			     unsigned long hwirq, int reg);
+	int (*set_type_config)(unsigned int **buf, unsigned int type,
+			       const struct regmap_irq *irq_data, int idx);
 	void *irq_drv_data;
 };
 
 struct regmap_irq_chip_data;
 
+int regmap_irq_set_type_config_simple(unsigned int **buf, unsigned int type,
+				      const struct regmap_irq *irq_data, int idx);
+
 int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
 			int irq_base, const struct regmap_irq_chip *chip,
 			struct regmap_irq_chip_data **data);
-- 
2.35.1


  parent reply	other threads:[~2022-06-20 20:06 UTC|newest]

Thread overview: 73+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-20 20:05 [PATCH 00/49] regmap-irq cleanups and refactoring Aidan MacDonald
2022-06-20 20:05 ` [PATCH 01/49] regmap-irq: Fix a bug in regmap_irq_enable() for type_in_mask chips Aidan MacDonald
2022-06-20 20:05 ` [PATCH 02/49] regmap-irq: Fix offset/index mismatch in read_sub_irq_data() Aidan MacDonald
2022-06-23  9:03   ` Matti Vaittinen
2022-06-23 23:29   ` Guru Das Srinagesh
2022-06-20 20:05 ` [PATCH 03/49] regmap-irq: Remove an unnecessary restriction on type_in_mask Aidan MacDonald
2022-06-20 20:05 ` Aidan MacDonald [this message]
2022-06-21  9:22   ` [PATCH 04/49] regmap-irq: Introduce config registers for irq types Andy Shevchenko
2022-06-20 20:06 ` [PATCH 05/49] mfd: qcom-pm8008: Convert irq chip to config regs Aidan MacDonald
2022-06-20 20:06 ` [PATCH 06/49] mfd: wcd934x: " Aidan MacDonald
2022-06-20 20:06 ` [PATCH 07/49] sound: soc: codecs: wcd9335: " Aidan MacDonald
2022-06-20 20:06 ` [PATCH 08/49] sound: soc: codecs: wcd938x: Remove spurious type_base from irq chip Aidan MacDonald
2022-06-20 20:06 ` [PATCH 09/49] mfd: max77650: Remove useless type_invert flag Aidan MacDonald
2022-06-20 20:06 ` [PATCH 10/49] regmap-irq: Remove virtual registers support Aidan MacDonald
2022-06-20 20:06 ` [PATCH 11/49] regmap-irq: Remove old type register support, refactor Aidan MacDonald
2022-06-20 20:06 ` [PATCH 12/49] regmap-irq: Remove unused type_reg_stride field Aidan MacDonald
2022-06-20 20:06 ` [PATCH 13/49] regmap-irq: Remove unused type_invert flag Aidan MacDonald
2022-06-20 20:06 ` [PATCH 14/49] regmap-irq: Do not use regmap_irq_update_bits() for wake regs Aidan MacDonald
2022-06-20 20:06 ` [PATCH 15/49] regmap-irq: Change the behavior of mask_writeonly Aidan MacDonald
2022-06-21  9:29   ` Andy Shevchenko
2022-06-21 21:13     ` Aidan MacDonald
     [not found]       ` <CAHp75VfoMKo9-_OTF1AAC0KyNJOb5qvYPTgHxmkYwOfTJFSLkg@mail.gmail.com>
2022-06-23 20:54         ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 16/49] regmap-irq: Rename regmap_irq_update_bits() Aidan MacDonald
2022-06-20 20:06 ` [PATCH 17/49] regmap-irq: Add broken_mask_unmask flag Aidan MacDonald
2022-06-21  9:33   ` Andy Shevchenko
2022-06-21 21:07     ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 18/49] mfd: qcom-pm8008: Add broken_mask_unmask irq chip flag Aidan MacDonald
2022-06-21  9:35   ` Andy Shevchenko
2022-06-24  0:03     ` Guru Das Srinagesh
2022-06-20 20:06 ` [PATCH 19/49] mfd: stpmic1: " Aidan MacDonald
2022-06-21  9:35   ` Andy Shevchenko
2022-06-20 20:06 ` [PATCH 20/49] regmap-irq: Fix inverted handling of unmask registers Aidan MacDonald
2022-06-21  9:40   ` Andy Shevchenko
2022-06-24  0:21   ` Guru Das Srinagesh
2022-06-20 20:06 ` [PATCH 21/49] mfd: tps65090: replace irqchip mask_invert with unmask_base Aidan MacDonald
2022-06-20 20:06 ` [PATCH 22/49] mfd: sun4i-gpadc: " Aidan MacDonald
2022-06-20 20:06 ` [PATCH 23/49] mfd: sprd-sc27xx-spi: " Aidan MacDonald
2022-06-20 20:06 ` [PATCH 24/49] mfd: rt5033: " Aidan MacDonald
2022-06-20 20:06 ` [PATCH 25/49] mfd: rohm-bd71828: " Aidan MacDonald
2022-06-20 20:06 ` [PATCH 26/49] mfd: rn5t618: " Aidan MacDonald
2022-06-20 20:06 ` [PATCH 27/49] mfd: gateworks-gsc: " Aidan MacDonald
2022-06-20 20:06 ` [PATCH 28/49] mfd: axp20x: " Aidan MacDonald
2022-06-20 20:06 ` [PATCH 29/49] mfd: atc260x: " Aidan MacDonald
2022-06-20 20:06 ` [PATCH 30/49] mfd: 88pm800: " Aidan MacDonald
2022-06-20 20:06 ` [PATCH 31/49] mfd: max14577: " Aidan MacDonald
2022-06-20 20:06 ` [PATCH 32/49] mfd: max77693: " Aidan MacDonald
2022-06-20 20:06 ` [PATCH 33/49] mfd: rohm-bd718x7: drop useless mask_invert flag on irqchip Aidan MacDonald
2022-06-23  9:09   ` Vaittinen, Matti
2022-06-20 20:06 ` [PATCH 34/49] mfd: max77843: " Aidan MacDonald
2022-06-20 20:06 ` [PATCH 35/49] extcon: max77843: replace irqchip mask_invert with unmask_base Aidan MacDonald
2022-06-20 20:06 ` [PATCH 36/49] extcon: sm5502: drop useless mask_invert flag on irqchip Aidan MacDonald
2022-06-20 20:06 ` [PATCH 37/49] extcon: rt8973a: " Aidan MacDonald
2022-06-20 20:06 ` [PATCH 38/49] irqchip: sl28cpld: replace irqchip mask_invert with unmask_base Aidan MacDonald
2022-06-20 20:06 ` [PATCH 39/49] gpio: " Aidan MacDonald
2022-06-21  9:42   ` Andy Shevchenko
2022-06-23  6:33   ` Michael Walle
2022-06-20 20:06 ` [PATCH 40/49] mfd: stpmic1: Fix broken mask/unmask in irq chip Aidan MacDonald
2022-06-20 20:06 ` [PATCH 41/49] mfd: stpmic1: Enable mask_writeonly flag for " Aidan MacDonald
2022-06-20 20:06 ` [PATCH 42/49] mfd: qcom-pm8008: Fix broken mask/unmask in " Aidan MacDonald
2022-06-20 20:06 ` [PATCH 43/49] mfd: qcom-pm8008: Enable mask_writeonly flag for " Aidan MacDonald
2022-06-20 20:06 ` [PATCH 44/49] regmap-irq: Remove broken_mask_unmask flag Aidan MacDonald
2022-06-20 20:06 ` [PATCH 45/49] regmap-irq: Remove mask_invert flag Aidan MacDonald
2022-06-20 20:06 ` [PATCH 46/49] regmap-irq: Refactor checks for status bulk read support Aidan MacDonald
2022-06-21  9:45   ` Andy Shevchenko
2022-06-20 20:06 ` [PATCH 47/49] regmap-irq: Add get_irq_reg() callback Aidan MacDonald
2022-06-21  9:51   ` Andy Shevchenko
2022-06-20 20:06 ` [PATCH 48/49] mfd: qcom-pm8008: Use get_irq_reg() for irq chip Aidan MacDonald
2022-06-20 20:06 ` [PATCH 49/49] regmap-irq: Remove not_fixed_stride flag Aidan MacDonald
2022-06-21  9:25 ` [PATCH 00/49] regmap-irq cleanups and refactoring Andy Shevchenko
2022-06-21 17:08 ` Mark Brown
2022-06-21 21:04   ` Aidan MacDonald
2022-06-23 13:18     ` Mark Brown
2022-06-22 15:16 ` (subset) " Mark Brown

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