Re: [PATCH v2 2/2] pinctrl: ocelot: Fix pincfg

[Horatiu Vultur <horatiu.vultur@microchip.com>]

The 07/09/2022 00:02, Andy Shevchenko wrote:

Hi Colin, Andy,

> 
> On Fri, Jul 8, 2022 at 10:17 PM Colin Foster
> <colin.foster@in-advantage.com> wrote:
> > On Fri, Jul 08, 2022 at 09:55:10PM +0200, Horatiu Vultur wrote:
> > > The blamed commit changed to use regmaps instead of __iomem. But it
> > > didn't update the register offsets to be at word offset, so it uses byte
> > > offset.
> > > Another issue with the same commit is that it a limit of 32 registers
> 
> it has a limit
> 
> > > which is incorrect. The sparx5 has 64 while lan966x has 77.
> 
> ...
> 
> > > -             .max_register = 32,
> >
> > What happens in /sys/kernel/debug/regmap/*-pincfg/{range,registers} when
> > there's no max register?
> 
> Good question!

If .max_register is missing then I got the following:

# cd /sys/kernel/debug/regmap/e2004064.pinctrl-pincfg/
# cat range
0-0
# cat registers
0: 00000005

> 
> > Should it be this?
> >
> > struct regmap_config regmap_config = {
> >     ...
> > };
> > regmap_config.max_register = info->desc->npins * regmap_config.reg_stride;
> >
> > >               .name = "pincfg",
> > >       };
> 
> If regmap configuration may be const, I would prefer to have a
> hardcoded value and different configuration based on the chip, but if
> it's not feasible, then this could suffice.

What about if we do something like:

const struct regmap_config regmap_config = {
    ...
    .max_register = info->desc->npins * 4,
    ...
};

This is based on what Colin suggested only that we keep the const.

> 
> --
> With Best Regards,
> Andy Shevchenko

-- 
/Horatiu