From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5418C433EF for ; Mon, 11 Jul 2022 20:23:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229437AbiGKUXH (ORCPT ); Mon, 11 Jul 2022 16:23:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42604 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229977AbiGKUXG (ORCPT ); Mon, 11 Jul 2022 16:23:06 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 904ED357FF; Mon, 11 Jul 2022 13:23:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1657570984; x=1689106984; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=sNVS+KcPsWhAjJnadCcEhTGBjML0xg+WgJRGyIyOaj0=; b=WQGwEcncRO4y/T69LEi9bW8XTw18l6X3GxZwokcoR2Zq+OQZYMYrQHly 1DmYdhDHFpa0/aX8clq345PjFQOf5Q1rgaR+DDke7+Vv3HKiCSkicRqTg bt435hT7Ym53uaukaCVCAAxGhN+aVQAWRzzWSEIYmYBbnCeTWPdGTK2ZP L5spoxeq03cZoYYiqJDBTC2nJbSqaFvN1ePBvtT2UIKh+vRvDvRsHVz3Y U3buYyjlaZKX82qKzIygL21FIt/J08X1LRpa4bWO4E+7lKnteeqqQqkJV zMAYYcrQMi+qLihaaruGyEhsX0X7CGIgP7OEscdsfwU1qxrtKei/uRErB w==; X-IronPort-AV: E=Sophos;i="5.92,263,1650956400"; d="scan'208";a="103985574" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 11 Jul 2022 13:22:46 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Mon, 11 Jul 2022 13:22:45 -0700 Received: from localhost (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Mon, 11 Jul 2022 13:22:45 -0700 Date: Mon, 11 Jul 2022 22:26:46 +0200 From: Horatiu Vultur To: Andy Shevchenko CC: "open list:GPIO SUBSYSTEM" , "Linux Kernel Mailing List" , Linus Walleij , , "Alexandre Belloni" , Colin Foster , Microchip Linux Driver Support , Maxime Chevallier , Michael Walle Subject: Re: [PATCH v3 2/2] pinctrl: ocelot: Fix pincfg Message-ID: <20220711202646.om65vrksyifvkfkw@soft-dev3-1.localhost> References: <20220711192113.3522664-1-horatiu.vultur@microchip.com> <20220711192113.3522664-3-horatiu.vultur@microchip.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The 07/11/2022 21:51, Andy Shevchenko wrote: > > On Mon, Jul 11, 2022 at 9:17 PM Horatiu Vultur > wrote: > > > > The blamed commit changed to use regmaps instead of __iomem. But it > > didn't update the register offsets to be at word offset, so it uses byte > > offset. > > Another issue with the same commit is that it has a limit of 32 registers > > which is incorrect. The sparx5 has 64 while lan966x has 77. > > ... > > > -static struct regmap *ocelot_pinctrl_create_pincfg(struct platform_device *pdev) > > +static struct regmap *ocelot_pinctrl_create_pincfg(struct ocelot_pinctrl *info, > > + struct platform_device *pdev) > > const? > > And I would leave pdev to be the first parameter, if there are no > other functions that have them like this. I will do that in the next version. Just for my understanding/knowledge why is this desire to have const or to keep the const? > > -- > With Best Regards, > Andy Shevchenko -- /Horatiu