* [PATCH v1 1/1] gpio: rockchip: Switch to use fwnode instead of of_node
@ 2022-08-30 19:19 Andy Shevchenko
2022-08-30 22:39 ` kernel test robot
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Andy Shevchenko @ 2022-08-30 19:19 UTC (permalink / raw)
To: Linus Walleij, Jianqun Xu, linux-gpio, linux-arm-kernel,
linux-rockchip, linux-kernel
Cc: Bartosz Golaszewski, Heiko Stuebner, Andy Shevchenko
GPIO library now accepts fwnode as a firmware node, so
switch the driver to use it.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/gpio/gpio-rockchip.c | 32 ++++++++++++++++--------------
drivers/pinctrl/pinctrl-rockchip.h | 6 ++++--
2 files changed, 21 insertions(+), 17 deletions(-)
diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c
index bb50335239ac..6e847f326ff4 100644
--- a/drivers/gpio/gpio-rockchip.c
+++ b/drivers/gpio/gpio-rockchip.c
@@ -20,6 +20,7 @@
#include <linux/of_device.h>
#include <linux/of_irq.h>
#include <linux/pinctrl/pinconf-generic.h>
+#include <linux/property.h>
#include <linux/regmap.h>
#include "../pinctrl/core.h"
@@ -518,7 +519,7 @@ static int rockchip_interrupts_register(struct rockchip_pin_bank *bank)
struct irq_chip_generic *gc;
int ret;
- bank->domain = irq_domain_add_linear(bank->of_node, 32,
+ bank->domain = irq_domain_create_linear(bank->fwnode, 32,
&irq_generic_chip_ops, NULL);
if (!bank->domain) {
dev_warn(bank->dev, "could not init irq domain for bank %s\n",
@@ -606,14 +607,14 @@ static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank)
* files which don't set the "gpio-ranges" property or systems that
* utilize ACPI the driver has to call gpiochip_add_pin_range().
*/
- if (!of_property_read_bool(bank->of_node, "gpio-ranges")) {
- struct device_node *pctlnp = of_get_parent(bank->of_node);
+ if (!fwnode_property_read_bool(bank->fwnode, "gpio-ranges")) {
+ struct fwnode_handle *parent = fwnode_get_parent(bank->fwnode);
struct pinctrl_dev *pctldev = NULL;
if (!pctlnp)
return -ENODATA;
- pctldev = of_pinctrl_get(pctlnp);
+ pctldev = of_pinctrl_get(to_of_node(parent));
if (!pctldev)
return -ENODEV;
@@ -641,10 +642,11 @@ static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank)
static int rockchip_get_bank_data(struct rockchip_pin_bank *bank)
{
+ struct device_node *node = to_of_node(bank->fwnode);
struct resource res;
int id = 0;
- if (of_address_to_resource(bank->of_node, 0, &res)) {
+ if (of_address_to_resource(node, 0, &res)) {
dev_err(bank->dev, "cannot find IO resource for bank\n");
return -ENOENT;
}
@@ -653,11 +655,11 @@ static int rockchip_get_bank_data(struct rockchip_pin_bank *bank)
if (IS_ERR(bank->reg_base))
return PTR_ERR(bank->reg_base);
- bank->irq = irq_of_parse_and_map(bank->of_node, 0);
+ bank->irq = irq_of_parse_and_map(node, 0);
if (!bank->irq)
return -EINVAL;
- bank->clk = of_clk_get(bank->of_node, 0);
+ bank->clk = of_clk_get(node, 0);
if (IS_ERR(bank->clk))
return PTR_ERR(bank->clk);
@@ -668,7 +670,7 @@ static int rockchip_get_bank_data(struct rockchip_pin_bank *bank)
if (id == GPIO_TYPE_V2 || id == GPIO_TYPE_V2_1) {
bank->gpio_regs = &gpio_regs_v2;
bank->gpio_type = GPIO_TYPE_V2;
- bank->db_clk = of_clk_get(bank->of_node, 1);
+ bank->db_clk = of_clk_get(node, 1);
if (IS_ERR(bank->db_clk)) {
dev_err(bank->dev, "cannot find debounce clk\n");
clk_disable_unprepare(bank->clk);
@@ -704,22 +706,22 @@ rockchip_gpio_find_bank(struct pinctrl_dev *pctldev, int id)
static int rockchip_gpio_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
- struct device_node *np = dev->of_node;
- struct device_node *pctlnp = of_get_parent(np);
+ struct fwnode_handle *fwnode = dev_fwnode(dev);
+ struct fwnode_handle *parent = fwnode_get_parent(fwnode);
struct pinctrl_dev *pctldev = NULL;
struct rockchip_pin_bank *bank = NULL;
struct rockchip_pin_deferred *cfg;
static int gpio;
int id, ret;
- if (!np || !pctlnp)
+ if (!parent)
return -ENODEV;
- pctldev = of_pinctrl_get(pctlnp);
+ pctldev = of_pinctrl_get(to_of_node(parent));
if (!pctldev)
return -EPROBE_DEFER;
- id = of_alias_get_id(np, "gpio");
+ id = of_alias_get_id(to_of_node(fwnode), "gpio");
if (id < 0)
id = gpio++;
@@ -728,7 +730,7 @@ static int rockchip_gpio_probe(struct platform_device *pdev)
return -EINVAL;
bank->dev = dev;
- bank->of_node = np;
+ bank->fwnode = fwnode;
raw_spin_lock_init(&bank->slock);
@@ -776,7 +778,7 @@ static int rockchip_gpio_probe(struct platform_device *pdev)
mutex_unlock(&bank->deferred_lock);
platform_set_drvdata(pdev, bank);
- dev_info(dev, "probed %pOF\n", np);
+ dev_info(dev, "probed %pfw\n", fwnode);
return 0;
}
diff --git a/drivers/pinctrl/pinctrl-rockchip.h b/drivers/pinctrl/pinctrl-rockchip.h
index 4759f336941e..411ed6a09842 100644
--- a/drivers/pinctrl/pinctrl-rockchip.h
+++ b/drivers/pinctrl/pinctrl-rockchip.h
@@ -18,6 +18,8 @@
#ifndef _PINCTRL_ROCKCHIP_H
#define _PINCTRL_ROCKCHIP_H
+struct fwnode_handle;
+
#define RK_GPIO0_A0 0
#define RK_GPIO0_A1 1
#define RK_GPIO0_A2 2
@@ -299,7 +301,7 @@ struct rockchip_drv {
* @drv: array describing the 4 drive strength sources of the bank
* @pull_type: array describing the 4 pull type sources of the bank
* @valid: is all necessary information present
- * @of_node: dt node of this bank
+ * @fwnode: firmware node of this bank
* @drvdata: common pinctrl basedata
* @domain: irqdomain of the gpio bank
* @gpio_chip: gpiolib chip
@@ -327,7 +329,7 @@ struct rockchip_pin_bank {
struct rockchip_drv drv[4];
enum rockchip_pin_pull_type pull_type[4];
bool valid;
- struct device_node *of_node;
+ struct fwnode_handle *fwnode;
struct rockchip_pinctrl *drvdata;
struct irq_domain *domain;
struct gpio_chip gpio_chip;
--
2.35.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v1 1/1] gpio: rockchip: Switch to use fwnode instead of of_node
2022-08-30 19:19 [PATCH v1 1/1] gpio: rockchip: Switch to use fwnode instead of of_node Andy Shevchenko
@ 2022-08-30 22:39 ` kernel test robot
2022-08-30 22:50 ` kernel test robot
2022-08-31 12:14 ` Bartosz Golaszewski
2 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2022-08-30 22:39 UTC (permalink / raw)
To: Andy Shevchenko, Linus Walleij, Jianqun Xu, linux-gpio,
linux-arm-kernel, linux-rockchip, linux-kernel
Cc: kbuild-all, Bartosz Golaszewski, Heiko Stuebner, Andy Shevchenko
Hi Andy,
I love your patch! Yet something to improve:
[auto build test ERROR on rockchip/for-next]
[also build test ERROR on linus/master v6.0-rc3 next-20220830]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Andy-Shevchenko/gpio-rockchip-Switch-to-use-fwnode-instead-of-of_node/20220831-032131
base: https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git for-next
config: arc-randconfig-r043-20220830 (https://download.01.org/0day-ci/archive/20220831/202208310652.Xhve2TGB-lkp@intel.com/config)
compiler: arceb-elf-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/678cf6450de6a016c041c3cd2ce58d1383d070e6
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Andy-Shevchenko/gpio-rockchip-Switch-to-use-fwnode-instead-of-of_node/20220831-032131
git checkout 678cf6450de6a016c041c3cd2ce58d1383d070e6
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arc SHELL=/bin/bash drivers/gpio/
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/gpio/gpio-rockchip.c: In function 'rockchip_gpiolib_register':
>> drivers/gpio/gpio-rockchip.c:614:22: error: 'pctlnp' undeclared (first use in this function)
614 | if (!pctlnp)
| ^~~~~~
drivers/gpio/gpio-rockchip.c:614:22: note: each undeclared identifier is reported only once for each function it appears in
vim +/pctlnp +614 drivers/gpio/gpio-rockchip.c
936ee2675eee1f Jianqun Xu 2021-08-16 579
936ee2675eee1f Jianqun Xu 2021-08-16 580 static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank)
936ee2675eee1f Jianqun Xu 2021-08-16 581 {
936ee2675eee1f Jianqun Xu 2021-08-16 582 struct gpio_chip *gc;
936ee2675eee1f Jianqun Xu 2021-08-16 583 int ret;
936ee2675eee1f Jianqun Xu 2021-08-16 584
936ee2675eee1f Jianqun Xu 2021-08-16 585 bank->gpio_chip = rockchip_gpiolib_chip;
936ee2675eee1f Jianqun Xu 2021-08-16 586
936ee2675eee1f Jianqun Xu 2021-08-16 587 gc = &bank->gpio_chip;
936ee2675eee1f Jianqun Xu 2021-08-16 588 gc->base = bank->pin_base;
936ee2675eee1f Jianqun Xu 2021-08-16 589 gc->ngpio = bank->nr_pins;
936ee2675eee1f Jianqun Xu 2021-08-16 590 gc->label = bank->name;
936ee2675eee1f Jianqun Xu 2021-08-16 591 gc->parent = bank->dev;
936ee2675eee1f Jianqun Xu 2021-08-16 592
936ee2675eee1f Jianqun Xu 2021-08-16 593 ret = gpiochip_add_data(gc, bank);
936ee2675eee1f Jianqun Xu 2021-08-16 594 if (ret) {
936ee2675eee1f Jianqun Xu 2021-08-16 595 dev_err(bank->dev, "failed to add gpiochip %s, %d\n",
936ee2675eee1f Jianqun Xu 2021-08-16 596 gc->label, ret);
936ee2675eee1f Jianqun Xu 2021-08-16 597 return ret;
936ee2675eee1f Jianqun Xu 2021-08-16 598 }
936ee2675eee1f Jianqun Xu 2021-08-16 599
936ee2675eee1f Jianqun Xu 2021-08-16 600 /*
936ee2675eee1f Jianqun Xu 2021-08-16 601 * For DeviceTree-supported systems, the gpio core checks the
936ee2675eee1f Jianqun Xu 2021-08-16 602 * pinctrl's device node for the "gpio-ranges" property.
936ee2675eee1f Jianqun Xu 2021-08-16 603 * If it is present, it takes care of adding the pin ranges
936ee2675eee1f Jianqun Xu 2021-08-16 604 * for the driver. In this case the driver can skip ahead.
936ee2675eee1f Jianqun Xu 2021-08-16 605 *
936ee2675eee1f Jianqun Xu 2021-08-16 606 * In order to remain compatible with older, existing DeviceTree
936ee2675eee1f Jianqun Xu 2021-08-16 607 * files which don't set the "gpio-ranges" property or systems that
936ee2675eee1f Jianqun Xu 2021-08-16 608 * utilize ACPI the driver has to call gpiochip_add_pin_range().
936ee2675eee1f Jianqun Xu 2021-08-16 609 */
678cf6450de6a0 Andy Shevchenko 2022-08-30 610 if (!fwnode_property_read_bool(bank->fwnode, "gpio-ranges")) {
678cf6450de6a0 Andy Shevchenko 2022-08-30 611 struct fwnode_handle *parent = fwnode_get_parent(bank->fwnode);
936ee2675eee1f Jianqun Xu 2021-08-16 612 struct pinctrl_dev *pctldev = NULL;
936ee2675eee1f Jianqun Xu 2021-08-16 613
936ee2675eee1f Jianqun Xu 2021-08-16 @614 if (!pctlnp)
936ee2675eee1f Jianqun Xu 2021-08-16 615 return -ENODATA;
936ee2675eee1f Jianqun Xu 2021-08-16 616
678cf6450de6a0 Andy Shevchenko 2022-08-30 617 pctldev = of_pinctrl_get(to_of_node(parent));
936ee2675eee1f Jianqun Xu 2021-08-16 618 if (!pctldev)
936ee2675eee1f Jianqun Xu 2021-08-16 619 return -ENODEV;
936ee2675eee1f Jianqun Xu 2021-08-16 620
936ee2675eee1f Jianqun Xu 2021-08-16 621 ret = gpiochip_add_pin_range(gc, dev_name(pctldev->dev), 0,
936ee2675eee1f Jianqun Xu 2021-08-16 622 gc->base, gc->ngpio);
936ee2675eee1f Jianqun Xu 2021-08-16 623 if (ret) {
936ee2675eee1f Jianqun Xu 2021-08-16 624 dev_err(bank->dev, "Failed to add pin range\n");
936ee2675eee1f Jianqun Xu 2021-08-16 625 goto fail;
936ee2675eee1f Jianqun Xu 2021-08-16 626 }
936ee2675eee1f Jianqun Xu 2021-08-16 627 }
936ee2675eee1f Jianqun Xu 2021-08-16 628
936ee2675eee1f Jianqun Xu 2021-08-16 629 ret = rockchip_interrupts_register(bank);
936ee2675eee1f Jianqun Xu 2021-08-16 630 if (ret) {
936ee2675eee1f Jianqun Xu 2021-08-16 631 dev_err(bank->dev, "failed to register interrupt, %d\n", ret);
936ee2675eee1f Jianqun Xu 2021-08-16 632 goto fail;
936ee2675eee1f Jianqun Xu 2021-08-16 633 }
936ee2675eee1f Jianqun Xu 2021-08-16 634
936ee2675eee1f Jianqun Xu 2021-08-16 635 return 0;
936ee2675eee1f Jianqun Xu 2021-08-16 636
936ee2675eee1f Jianqun Xu 2021-08-16 637 fail:
936ee2675eee1f Jianqun Xu 2021-08-16 638 gpiochip_remove(&bank->gpio_chip);
936ee2675eee1f Jianqun Xu 2021-08-16 639
936ee2675eee1f Jianqun Xu 2021-08-16 640 return ret;
936ee2675eee1f Jianqun Xu 2021-08-16 641 }
936ee2675eee1f Jianqun Xu 2021-08-16 642
--
0-DAY CI Kernel Test Service
https://01.org/lkp
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v1 1/1] gpio: rockchip: Switch to use fwnode instead of of_node
2022-08-30 19:19 [PATCH v1 1/1] gpio: rockchip: Switch to use fwnode instead of of_node Andy Shevchenko
2022-08-30 22:39 ` kernel test robot
@ 2022-08-30 22:50 ` kernel test robot
2022-08-31 12:14 ` Bartosz Golaszewski
2 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2022-08-30 22:50 UTC (permalink / raw)
To: Andy Shevchenko, Linus Walleij, Jianqun Xu, linux-gpio,
linux-arm-kernel, linux-rockchip, linux-kernel
Cc: llvm, kbuild-all, Bartosz Golaszewski, Heiko Stuebner,
Andy Shevchenko
Hi Andy,
I love your patch! Yet something to improve:
[auto build test ERROR on rockchip/for-next]
[also build test ERROR on linus/master v6.0-rc3 next-20220830]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Andy-Shevchenko/gpio-rockchip-Switch-to-use-fwnode-instead-of-of_node/20220831-032131
base: https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git for-next
config: hexagon-randconfig-r032-20220830 (https://download.01.org/0day-ci/archive/20220831/202208310629.1JjkyeRu-lkp@intel.com/config)
compiler: clang version 16.0.0 (https://github.com/llvm/llvm-project c7df82e4693c19e3fd2e25c83eb04d9deb7b7b59)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/678cf6450de6a016c041c3cd2ce58d1383d070e6
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Andy-Shevchenko/gpio-rockchip-Switch-to-use-fwnode-instead-of-of_node/20220831-032131
git checkout 678cf6450de6a016c041c3cd2ce58d1383d070e6
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=hexagon SHELL=/bin/bash drivers/gpio/
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> drivers/gpio/gpio-rockchip.c:614:8: error: use of undeclared identifier 'pctlnp'
if (!pctlnp)
^
1 error generated.
vim +/pctlnp +614 drivers/gpio/gpio-rockchip.c
936ee2675eee1f Jianqun Xu 2021-08-16 579
936ee2675eee1f Jianqun Xu 2021-08-16 580 static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank)
936ee2675eee1f Jianqun Xu 2021-08-16 581 {
936ee2675eee1f Jianqun Xu 2021-08-16 582 struct gpio_chip *gc;
936ee2675eee1f Jianqun Xu 2021-08-16 583 int ret;
936ee2675eee1f Jianqun Xu 2021-08-16 584
936ee2675eee1f Jianqun Xu 2021-08-16 585 bank->gpio_chip = rockchip_gpiolib_chip;
936ee2675eee1f Jianqun Xu 2021-08-16 586
936ee2675eee1f Jianqun Xu 2021-08-16 587 gc = &bank->gpio_chip;
936ee2675eee1f Jianqun Xu 2021-08-16 588 gc->base = bank->pin_base;
936ee2675eee1f Jianqun Xu 2021-08-16 589 gc->ngpio = bank->nr_pins;
936ee2675eee1f Jianqun Xu 2021-08-16 590 gc->label = bank->name;
936ee2675eee1f Jianqun Xu 2021-08-16 591 gc->parent = bank->dev;
936ee2675eee1f Jianqun Xu 2021-08-16 592
936ee2675eee1f Jianqun Xu 2021-08-16 593 ret = gpiochip_add_data(gc, bank);
936ee2675eee1f Jianqun Xu 2021-08-16 594 if (ret) {
936ee2675eee1f Jianqun Xu 2021-08-16 595 dev_err(bank->dev, "failed to add gpiochip %s, %d\n",
936ee2675eee1f Jianqun Xu 2021-08-16 596 gc->label, ret);
936ee2675eee1f Jianqun Xu 2021-08-16 597 return ret;
936ee2675eee1f Jianqun Xu 2021-08-16 598 }
936ee2675eee1f Jianqun Xu 2021-08-16 599
936ee2675eee1f Jianqun Xu 2021-08-16 600 /*
936ee2675eee1f Jianqun Xu 2021-08-16 601 * For DeviceTree-supported systems, the gpio core checks the
936ee2675eee1f Jianqun Xu 2021-08-16 602 * pinctrl's device node for the "gpio-ranges" property.
936ee2675eee1f Jianqun Xu 2021-08-16 603 * If it is present, it takes care of adding the pin ranges
936ee2675eee1f Jianqun Xu 2021-08-16 604 * for the driver. In this case the driver can skip ahead.
936ee2675eee1f Jianqun Xu 2021-08-16 605 *
936ee2675eee1f Jianqun Xu 2021-08-16 606 * In order to remain compatible with older, existing DeviceTree
936ee2675eee1f Jianqun Xu 2021-08-16 607 * files which don't set the "gpio-ranges" property or systems that
936ee2675eee1f Jianqun Xu 2021-08-16 608 * utilize ACPI the driver has to call gpiochip_add_pin_range().
936ee2675eee1f Jianqun Xu 2021-08-16 609 */
678cf6450de6a0 Andy Shevchenko 2022-08-30 610 if (!fwnode_property_read_bool(bank->fwnode, "gpio-ranges")) {
678cf6450de6a0 Andy Shevchenko 2022-08-30 611 struct fwnode_handle *parent = fwnode_get_parent(bank->fwnode);
936ee2675eee1f Jianqun Xu 2021-08-16 612 struct pinctrl_dev *pctldev = NULL;
936ee2675eee1f Jianqun Xu 2021-08-16 613
936ee2675eee1f Jianqun Xu 2021-08-16 @614 if (!pctlnp)
936ee2675eee1f Jianqun Xu 2021-08-16 615 return -ENODATA;
936ee2675eee1f Jianqun Xu 2021-08-16 616
678cf6450de6a0 Andy Shevchenko 2022-08-30 617 pctldev = of_pinctrl_get(to_of_node(parent));
936ee2675eee1f Jianqun Xu 2021-08-16 618 if (!pctldev)
936ee2675eee1f Jianqun Xu 2021-08-16 619 return -ENODEV;
936ee2675eee1f Jianqun Xu 2021-08-16 620
936ee2675eee1f Jianqun Xu 2021-08-16 621 ret = gpiochip_add_pin_range(gc, dev_name(pctldev->dev), 0,
936ee2675eee1f Jianqun Xu 2021-08-16 622 gc->base, gc->ngpio);
936ee2675eee1f Jianqun Xu 2021-08-16 623 if (ret) {
936ee2675eee1f Jianqun Xu 2021-08-16 624 dev_err(bank->dev, "Failed to add pin range\n");
936ee2675eee1f Jianqun Xu 2021-08-16 625 goto fail;
936ee2675eee1f Jianqun Xu 2021-08-16 626 }
936ee2675eee1f Jianqun Xu 2021-08-16 627 }
936ee2675eee1f Jianqun Xu 2021-08-16 628
936ee2675eee1f Jianqun Xu 2021-08-16 629 ret = rockchip_interrupts_register(bank);
936ee2675eee1f Jianqun Xu 2021-08-16 630 if (ret) {
936ee2675eee1f Jianqun Xu 2021-08-16 631 dev_err(bank->dev, "failed to register interrupt, %d\n", ret);
936ee2675eee1f Jianqun Xu 2021-08-16 632 goto fail;
936ee2675eee1f Jianqun Xu 2021-08-16 633 }
936ee2675eee1f Jianqun Xu 2021-08-16 634
936ee2675eee1f Jianqun Xu 2021-08-16 635 return 0;
936ee2675eee1f Jianqun Xu 2021-08-16 636
936ee2675eee1f Jianqun Xu 2021-08-16 637 fail:
936ee2675eee1f Jianqun Xu 2021-08-16 638 gpiochip_remove(&bank->gpio_chip);
936ee2675eee1f Jianqun Xu 2021-08-16 639
936ee2675eee1f Jianqun Xu 2021-08-16 640 return ret;
936ee2675eee1f Jianqun Xu 2021-08-16 641 }
936ee2675eee1f Jianqun Xu 2021-08-16 642
--
0-DAY CI Kernel Test Service
https://01.org/lkp
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v1 1/1] gpio: rockchip: Switch to use fwnode instead of of_node
2022-08-30 19:19 [PATCH v1 1/1] gpio: rockchip: Switch to use fwnode instead of of_node Andy Shevchenko
2022-08-30 22:39 ` kernel test robot
2022-08-30 22:50 ` kernel test robot
@ 2022-08-31 12:14 ` Bartosz Golaszewski
2 siblings, 0 replies; 4+ messages in thread
From: Bartosz Golaszewski @ 2022-08-31 12:14 UTC (permalink / raw)
To: Andy Shevchenko
Cc: Linus Walleij, Jianqun Xu, open list:GPIO SUBSYSTEM, Linux ARM,
open list:ARM/Rockchip SoC..., Linux Kernel Mailing List,
Heiko Stuebner
On Tue, Aug 30, 2022 at 9:19 PM Andy Shevchenko
<andriy.shevchenko@linux.intel.com> wrote:
>
> GPIO library now accepts fwnode as a firmware node, so
> switch the driver to use it.
>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> ---
> drivers/gpio/gpio-rockchip.c | 32 ++++++++++++++++--------------
> drivers/pinctrl/pinctrl-rockchip.h | 6 ++++--
> 2 files changed, 21 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c
> index bb50335239ac..6e847f326ff4 100644
> --- a/drivers/gpio/gpio-rockchip.c
> +++ b/drivers/gpio/gpio-rockchip.c
> @@ -20,6 +20,7 @@
> #include <linux/of_device.h>
> #include <linux/of_irq.h>
> #include <linux/pinctrl/pinconf-generic.h>
> +#include <linux/property.h>
> #include <linux/regmap.h>
>
> #include "../pinctrl/core.h"
> @@ -518,7 +519,7 @@ static int rockchip_interrupts_register(struct rockchip_pin_bank *bank)
> struct irq_chip_generic *gc;
> int ret;
>
> - bank->domain = irq_domain_add_linear(bank->of_node, 32,
> + bank->domain = irq_domain_create_linear(bank->fwnode, 32,
> &irq_generic_chip_ops, NULL);
> if (!bank->domain) {
> dev_warn(bank->dev, "could not init irq domain for bank %s\n",
> @@ -606,14 +607,14 @@ static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank)
> * files which don't set the "gpio-ranges" property or systems that
> * utilize ACPI the driver has to call gpiochip_add_pin_range().
> */
> - if (!of_property_read_bool(bank->of_node, "gpio-ranges")) {
> - struct device_node *pctlnp = of_get_parent(bank->of_node);
> + if (!fwnode_property_read_bool(bank->fwnode, "gpio-ranges")) {
> + struct fwnode_handle *parent = fwnode_get_parent(bank->fwnode);
> struct pinctrl_dev *pctldev = NULL;
>
> if (!pctlnp)
> return -ENODATA;
>
> - pctldev = of_pinctrl_get(pctlnp);
> + pctldev = of_pinctrl_get(to_of_node(parent));
Can you replace it with a high-level pinctrl_get()? Would get rid of
another of_ call.
> if (!pctldev)
> return -ENODEV;
>
> @@ -641,10 +642,11 @@ static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank)
>
> static int rockchip_get_bank_data(struct rockchip_pin_bank *bank)
> {
> + struct device_node *node = to_of_node(bank->fwnode);
> struct resource res;
> int id = 0;
>
> - if (of_address_to_resource(bank->of_node, 0, &res)) {
> + if (of_address_to_resource(node, 0, &res)) {
Same here - cannot we use the high-level interfaces for resources?
Index being 0 is telling me, it's a simple use-case. (Not sure for
that one though).
Same comments elsehwere really - if we're touching this driver, then
maybe we can switch to high-level device interfaces intead of using
the of_ flavors.
Bart
> dev_err(bank->dev, "cannot find IO resource for bank\n");
> return -ENOENT;
> }
> @@ -653,11 +655,11 @@ static int rockchip_get_bank_data(struct rockchip_pin_bank *bank)
> if (IS_ERR(bank->reg_base))
> return PTR_ERR(bank->reg_base);
>
> - bank->irq = irq_of_parse_and_map(bank->of_node, 0);
> + bank->irq = irq_of_parse_and_map(node, 0);
> if (!bank->irq)
> return -EINVAL;
>
> - bank->clk = of_clk_get(bank->of_node, 0);
> + bank->clk = of_clk_get(node, 0);
> if (IS_ERR(bank->clk))
> return PTR_ERR(bank->clk);
>
> @@ -668,7 +670,7 @@ static int rockchip_get_bank_data(struct rockchip_pin_bank *bank)
> if (id == GPIO_TYPE_V2 || id == GPIO_TYPE_V2_1) {
> bank->gpio_regs = &gpio_regs_v2;
> bank->gpio_type = GPIO_TYPE_V2;
> - bank->db_clk = of_clk_get(bank->of_node, 1);
> + bank->db_clk = of_clk_get(node, 1);
> if (IS_ERR(bank->db_clk)) {
> dev_err(bank->dev, "cannot find debounce clk\n");
> clk_disable_unprepare(bank->clk);
> @@ -704,22 +706,22 @@ rockchip_gpio_find_bank(struct pinctrl_dev *pctldev, int id)
> static int rockchip_gpio_probe(struct platform_device *pdev)
> {
> struct device *dev = &pdev->dev;
> - struct device_node *np = dev->of_node;
> - struct device_node *pctlnp = of_get_parent(np);
> + struct fwnode_handle *fwnode = dev_fwnode(dev);
> + struct fwnode_handle *parent = fwnode_get_parent(fwnode);
> struct pinctrl_dev *pctldev = NULL;
> struct rockchip_pin_bank *bank = NULL;
> struct rockchip_pin_deferred *cfg;
> static int gpio;
> int id, ret;
>
> - if (!np || !pctlnp)
> + if (!parent)
> return -ENODEV;
>
> - pctldev = of_pinctrl_get(pctlnp);
> + pctldev = of_pinctrl_get(to_of_node(parent));
> if (!pctldev)
> return -EPROBE_DEFER;
>
> - id = of_alias_get_id(np, "gpio");
> + id = of_alias_get_id(to_of_node(fwnode), "gpio");
> if (id < 0)
> id = gpio++;
>
> @@ -728,7 +730,7 @@ static int rockchip_gpio_probe(struct platform_device *pdev)
> return -EINVAL;
>
> bank->dev = dev;
> - bank->of_node = np;
> + bank->fwnode = fwnode;
>
> raw_spin_lock_init(&bank->slock);
>
> @@ -776,7 +778,7 @@ static int rockchip_gpio_probe(struct platform_device *pdev)
> mutex_unlock(&bank->deferred_lock);
>
> platform_set_drvdata(pdev, bank);
> - dev_info(dev, "probed %pOF\n", np);
> + dev_info(dev, "probed %pfw\n", fwnode);
>
> return 0;
> }
> diff --git a/drivers/pinctrl/pinctrl-rockchip.h b/drivers/pinctrl/pinctrl-rockchip.h
> index 4759f336941e..411ed6a09842 100644
> --- a/drivers/pinctrl/pinctrl-rockchip.h
> +++ b/drivers/pinctrl/pinctrl-rockchip.h
> @@ -18,6 +18,8 @@
> #ifndef _PINCTRL_ROCKCHIP_H
> #define _PINCTRL_ROCKCHIP_H
>
> +struct fwnode_handle;
> +
> #define RK_GPIO0_A0 0
> #define RK_GPIO0_A1 1
> #define RK_GPIO0_A2 2
> @@ -299,7 +301,7 @@ struct rockchip_drv {
> * @drv: array describing the 4 drive strength sources of the bank
> * @pull_type: array describing the 4 pull type sources of the bank
> * @valid: is all necessary information present
> - * @of_node: dt node of this bank
> + * @fwnode: firmware node of this bank
> * @drvdata: common pinctrl basedata
> * @domain: irqdomain of the gpio bank
> * @gpio_chip: gpiolib chip
> @@ -327,7 +329,7 @@ struct rockchip_pin_bank {
> struct rockchip_drv drv[4];
> enum rockchip_pin_pull_type pull_type[4];
> bool valid;
> - struct device_node *of_node;
> + struct fwnode_handle *fwnode;
> struct rockchip_pinctrl *drvdata;
> struct irq_domain *domain;
> struct gpio_chip gpio_chip;
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2022-08-31 12:14 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2022-08-30 19:19 [PATCH v1 1/1] gpio: rockchip: Switch to use fwnode instead of of_node Andy Shevchenko
2022-08-30 22:39 ` kernel test robot
2022-08-30 22:50 ` kernel test robot
2022-08-31 12:14 ` Bartosz Golaszewski
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