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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Linus Walleij <linus.walleij@linaro.org>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Patrick Rudolph <patrick.rudolph@9elements.com>,
	linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v1 17/17] pinctrl: cy8c95x0: Correct comment style
Date: Fri,  2 Sep 2022 21:26:50 +0300	[thread overview]
Message-ID: <20220902182650.83098-17-andriy.shevchenko@linux.intel.com> (raw)
In-Reply-To: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com>

In a few comments the style is not aligned with the rest.
Correct them.

While at it, drop unneeded blank lines and deduplicate 'Author'.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/pinctrl/pinctrl-cy8c95x0.c | 40 +++++++++++++++---------------
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c
index 57302cb0186f..fc2c54164669 100644
--- a/drivers/pinctrl/pinctrl-cy8c95x0.c
+++ b/drivers/pinctrl/pinctrl-cy8c95x0.c
@@ -3,8 +3,8 @@
  * CY8C95X0 20/40/60 pin I2C GPIO port expander with interrupt support
  *
  * Copyright (C) 2022 9elements GmbH
- * Author: Patrick Rudolph <patrick.rudolph@9elements.com>
- * Author: Naresh Solanki <Naresh.Solanki@9elements.com>
+ * Authors: Patrick Rudolph <patrick.rudolph@9elements.com>
+ *	    Naresh Solanki <Naresh.Solanki@9elements.com>
  */
 
 #include <linux/acpi.h>
@@ -37,7 +37,7 @@
 
 /* Port Select configures the port */
 #define CY8C95X0_PORTSEL	0x18
-/* port settings, write PORTSEL first */
+/* Port settings, write PORTSEL first */
 #define CY8C95X0_INTMASK	0x19
 #define CY8C95X0_PWMSEL		0x1A
 #define CY8C95X0_INVERT		0x1B
@@ -72,7 +72,6 @@ static const struct of_device_id cy8c95x0_dt_ids[] = {
 	{ .compatible = "cypress,cy8c9560", .data = OF_CY8C95X(60), },
 	{ }
 };
-
 MODULE_DEVICE_TABLE(of, cy8c95x0_dt_ids);
 
 static const struct acpi_gpio_params cy8c95x0_irq_gpios = { 0, 0, true };
@@ -418,7 +417,7 @@ static int cy8c95x0_write_regs_mask(struct cy8c95x0_pinctrl *chip, int reg,
 			continue;
 
 		switch (reg) {
-		/* muxed registers */
+		/* Muxed registers */
 		case CY8C95X0_INTMASK:
 		case CY8C95X0_PWMSEL:
 		case CY8C95X0_INVERT:
@@ -435,7 +434,7 @@ static int cy8c95x0_write_regs_mask(struct cy8c95x0_pinctrl *chip, int reg,
 				goto out;
 			off = reg;
 			break;
-		/* direct access registers */
+		/* Direct access registers */
 		case CY8C95X0_INPUT:
 		case CY8C95X0_OUTPUT:
 		case CY8C95X0_INTSTATUS:
@@ -489,7 +488,7 @@ static int cy8c95x0_read_regs_mask(struct cy8c95x0_pinctrl *chip, int reg,
 			continue;
 
 		switch (reg) {
-		/* muxed registers */
+		/* Muxed registers */
 		case CY8C95X0_INTMASK:
 		case CY8C95X0_PWMSEL:
 		case CY8C95X0_INVERT:
@@ -506,7 +505,7 @@ static int cy8c95x0_read_regs_mask(struct cy8c95x0_pinctrl *chip, int reg,
 				goto out;
 			off = reg;
 			break;
-		/* direct access registers */
+		/* Direct access registers */
 		case CY8C95X0_INPUT:
 		case CY8C95X0_OUTPUT:
 		case CY8C95X0_INTSTATUS:
@@ -581,18 +580,18 @@ static int cy8c95x0_gpio_direction_output(struct gpio_chip *gc,
 	u8 bit = cypress_get_pin_mask(chip, off);
 	int ret;
 
-	/* set output level */
+	/* Set output level */
 	ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
 	if (ret)
 		return ret;
 
 	mutex_lock(&chip->i2c_lock);
-	/* select port */
+	/* Select port... */
 	ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, port);
 	if (ret)
 		goto out;
 
-	/* then direction */
+	/* ...then direction */
 	ret = regmap_write_bits(chip->regmap, CY8C95X0_DIRECTION, bit, 0);
 
 out:
@@ -613,7 +612,7 @@ static int cy8c95x0_gpio_get_value(struct gpio_chip *gc, unsigned int off)
 	if (ret < 0) {
 		/*
 		 * NOTE:
-		 * diagnostic already emitted; that's all we should
+		 * Diagnostic already emitted; that's all we should
 		 * do unless gpio_*_value_cansleep() calls become different
 		 * from their nonsleeping siblings (and report faults).
 		 */
@@ -676,7 +675,7 @@ static int cy8c95x0_gpio_get_pincfg(struct cy8c95x0_pinctrl *chip,
 
 	mutex_lock(&chip->i2c_lock);
 
-	/* select port */
+	/* Select port */
 	ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, port);
 	if (ret < 0)
 		goto out;
@@ -731,7 +730,8 @@ static int cy8c95x0_gpio_get_pincfg(struct cy8c95x0_pinctrl *chip,
 		ret = -ENOTSUPP;
 		goto out;
 	}
-	/* Writing 1 to one of the drive mode registers will automatically
+	/*
+	 * Writing 1 to one of the drive mode registers will automatically
 	 * clear conflicting set bits in the other drive mode registers.
 	 */
 	ret = regmap_read(chip->regmap, reg, &reg_val);
@@ -757,7 +757,7 @@ static int cy8c95x0_gpio_set_pincfg(struct cy8c95x0_pinctrl *chip,
 
 	mutex_lock(&chip->i2c_lock);
 
-	/* select port */
+	/* Select port */
 	ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, port);
 	if (ret < 0)
 		goto out;
@@ -794,7 +794,8 @@ static int cy8c95x0_gpio_set_pincfg(struct cy8c95x0_pinctrl *chip,
 		ret = -ENOTSUPP;
 		goto out;
 	}
-	/* Writing 1 to one of the drive mode registers will automatically
+	/*
+	 * Writing 1 to one of the drive mode registers will automatically
 	 * clear conflicting set bits in the other drive mode registers.
 	 */
 	ret = regmap_write_bits(chip->regmap, reg, bit, bit);
@@ -1119,7 +1120,7 @@ static int cy8c95x0_pinmux_cfg(struct cy8c95x0_pinctrl *chip,
 	u8 bit = cypress_get_pin_mask(chip, off);
 	int ret;
 
-	/* select port */
+	/* Select port */
 	ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, port);
 	if (ret < 0)
 		return ret;
@@ -1236,11 +1237,12 @@ static int cy8c95x0_setup_pinctrl(struct cy8c95x0_pinctrl *chip)
 	pd->pins = cy8c9560_pins;
 	pd->npins = chip->tpin;
 	pd->owner = THIS_MODULE;
-	chip->pctldev = devm_pinctrl_register(chip->dev, pd, chip);
 
+	chip->pctldev = devm_pinctrl_register(chip->dev, pd, chip);
 	if (IS_ERR(chip->pctldev))
 		return dev_err_probe(chip->dev, PTR_ERR(chip->pctldev),
 			"can't register controller\n");
+
 	return 0;
 }
 
@@ -1293,7 +1295,6 @@ static int cy8c95x0_probe(struct i2c_client *client)
 	chip->driver_data = (unsigned long)device_get_match_data(&client->dev);
 	if (!chip->driver_data)
 		chip->driver_data = i2c_match_id(cy8c95x0_id, client)->driver_data;
-
 	if (!chip->driver_data)
 		return -ENODEV;
 
@@ -1395,7 +1396,6 @@ static struct i2c_driver cy8c95x0_driver = {
 	.id_table	= cy8c95x0_id,
 	.detect		= cy8c95x0_detect,
 };
-
 module_i2c_driver(cy8c95x0_driver);
 
 MODULE_AUTHOR("Patrick Rudolph <patrick.rudolph@9elements.com>");
-- 
2.35.1


  parent reply	other threads:[~2022-09-02 18:35 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-02 18:26 [PATCH v1 01/17] pinctrl: cy8c95x0: make irq_chip immutable Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 02/17] pinctrl: cy8c95x0: Allow IRQ chip core to handle numbering Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 03/17] pinctrl: cy8c95x0: Allow most of the registers to be cached Andy Shevchenko
2022-09-02 18:42   ` Andy Shevchenko
2022-09-05 12:57     ` Andy Shevchenko
2022-09-05 13:30       ` Linus Walleij
2022-09-05 13:37         ` Andy Shevchenko
2022-09-06  8:36           ` Patrick Rudolph
2022-09-06 10:25             ` Andy Shevchenko
2022-09-08  8:03         ` Linus Walleij
2022-09-08  9:32           ` Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 04/17] pinctrl: cy8c95x0: Fix return value in cy8c95x0_detect() Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 05/17] pinctrl: cy8c95x0: Fix pin control name to enable more than one Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 06/17] pinctrl: cy8c95x0: Drop unneeded npins assignment Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 07/17] pinctrl: cy8c95x0: Enable GPIO range Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 08/17] pinctrl: cy8c95x0: Remove device initialization Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 09/17] pinctrl: cy8c95x0: Remove useless conditionals Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 10/17] pinctrl: cy8c95x0: Remove custom ->set_config() Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 11/17] pinctrl: cy8c95x0: Use 'default' in all switch-cases Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 12/17] pinctrl: cy8c95x0: Implement ->pin_dbg_show() Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 13/17] pinctrl: cy8c95x0: Make use of device properties Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 14/17] pinctrl: cy8c95x0: support ACPI device found on Galileo Gen1 Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 15/17] pinctrl: cy8c95x0: Override IRQ for one of the expanders on Galileo Gen 1 Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 16/17] pinctrl: cy8c95x0: use bits.h macros for all masks Andy Shevchenko
2022-09-02 18:26 ` Andy Shevchenko [this message]
2022-09-07  8:27   ` [PATCH v1 17/17] pinctrl: cy8c95x0: Correct comment style Patrick Rudolph

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