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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Linus Walleij <linus.walleij@linaro.org>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Patrick Rudolph <patrick.rudolph@9elements.com>,
	linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v1 07/17] pinctrl: cy8c95x0: Enable GPIO range
Date: Fri,  2 Sep 2022 21:26:40 +0300	[thread overview]
Message-ID: <20220902182650.83098-7-andriy.shevchenko@linux.intel.com> (raw)
In-Reply-To: <20220902182650.83098-1-andriy.shevchenko@linux.intel.com>

Since it's a pin control, GPIO counterpart needs to know the mapping
between pin numbering and GPIO numbering. Enable this by calling
gpiochip_add_pin_range() at the chip addition time.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/pinctrl/pinctrl-cy8c95x0.c | 22 ++++++++++++++++++----
 1 file changed, 18 insertions(+), 4 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c
index eac8b073e19f..f09311d2d3fa 100644
--- a/drivers/pinctrl/pinctrl-cy8c95x0.c
+++ b/drivers/pinctrl/pinctrl-cy8c95x0.c
@@ -801,7 +801,20 @@ static void cy8c95x0_gpio_set_multiple(struct gpio_chip *gc,
 	cy8c95x0_write_regs_mask(chip, CY8C95X0_OUTPUT, bits, mask);
 }
 
-static int cy8c95x0_setup_gpiochip(struct cy8c95x0_pinctrl *chip, int ngpio)
+static int cy8c95x0_add_pin_ranges(struct gpio_chip *gc)
+{
+	struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc);
+	struct device *dev = chip->dev;
+	int ret;
+
+	ret = gpiochip_add_pin_range(gc, dev_name(dev), 0, 0, chip->tpin);
+	if (ret)
+		dev_err(dev, "failed to add GPIO pin range\n");
+
+	return ret;
+}
+
+static int cy8c95x0_setup_gpiochip(struct cy8c95x0_pinctrl *chip)
 {
 	struct gpio_chip *gc = &chip->gpio_chip;
 
@@ -814,9 +827,10 @@ static int cy8c95x0_setup_gpiochip(struct cy8c95x0_pinctrl *chip, int ngpio)
 	gc->set_multiple = cy8c95x0_gpio_set_multiple;
 	gc->set_config = cy8c95x0_gpio_set_config;
 	gc->can_sleep = true;
+	gc->add_pin_ranges = cy8c95x0_add_pin_ranges;
 
 	gc->base = -1;
-	gc->ngpio = ngpio;
+	gc->ngpio = chip->tpin;
 
 	gc->parent = chip->dev;
 	gc->owner = THIS_MODULE;
@@ -1328,11 +1342,11 @@ static int cy8c95x0_probe(struct i2c_client *client)
 			goto err_exit;
 	}
 
-	ret = cy8c95x0_setup_gpiochip(chip, chip->tpin);
+	ret = cy8c95x0_setup_pinctrl(chip);
 	if (ret)
 		goto err_exit;
 
-	ret = cy8c95x0_setup_pinctrl(chip);
+	ret = cy8c95x0_setup_gpiochip(chip);
 	if (ret)
 		goto err_exit;
 
-- 
2.35.1


  parent reply	other threads:[~2022-09-02 18:34 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-02 18:26 [PATCH v1 01/17] pinctrl: cy8c95x0: make irq_chip immutable Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 02/17] pinctrl: cy8c95x0: Allow IRQ chip core to handle numbering Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 03/17] pinctrl: cy8c95x0: Allow most of the registers to be cached Andy Shevchenko
2022-09-02 18:42   ` Andy Shevchenko
2022-09-05 12:57     ` Andy Shevchenko
2022-09-05 13:30       ` Linus Walleij
2022-09-05 13:37         ` Andy Shevchenko
2022-09-06  8:36           ` Patrick Rudolph
2022-09-06 10:25             ` Andy Shevchenko
2022-09-08  8:03         ` Linus Walleij
2022-09-08  9:32           ` Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 04/17] pinctrl: cy8c95x0: Fix return value in cy8c95x0_detect() Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 05/17] pinctrl: cy8c95x0: Fix pin control name to enable more than one Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 06/17] pinctrl: cy8c95x0: Drop unneeded npins assignment Andy Shevchenko
2022-09-02 18:26 ` Andy Shevchenko [this message]
2022-09-02 18:26 ` [PATCH v1 08/17] pinctrl: cy8c95x0: Remove device initialization Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 09/17] pinctrl: cy8c95x0: Remove useless conditionals Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 10/17] pinctrl: cy8c95x0: Remove custom ->set_config() Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 11/17] pinctrl: cy8c95x0: Use 'default' in all switch-cases Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 12/17] pinctrl: cy8c95x0: Implement ->pin_dbg_show() Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 13/17] pinctrl: cy8c95x0: Make use of device properties Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 14/17] pinctrl: cy8c95x0: support ACPI device found on Galileo Gen1 Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 15/17] pinctrl: cy8c95x0: Override IRQ for one of the expanders on Galileo Gen 1 Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 16/17] pinctrl: cy8c95x0: use bits.h macros for all masks Andy Shevchenko
2022-09-02 18:26 ` [PATCH v1 17/17] pinctrl: cy8c95x0: Correct comment style Andy Shevchenko
2022-09-07  8:27   ` Patrick Rudolph

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