From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Linus Walleij <linus.walleij@linaro.org>,
Patrick Rudolph <patrick.rudolph@9elements.com>,
linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v1 2/3] pinctrl: cy8c95x0: Drop atomicity on operations on push_pull
Date: Fri, 16 Sep 2022 23:54:49 +0300 [thread overview]
Message-ID: <20220916205450.86278-2-andriy.shevchenko@linux.intel.com> (raw)
In-Reply-To: <20220916205450.86278-1-andriy.shevchenko@linux.intel.com>
The push_pull member is always accessed under the mutex, hence
no need to use atomic operations on it.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/pinctrl/pinctrl-cy8c95x0.c | 15 ++++++++-------
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c
index 75be06d29dc1..367a9386dfb7 100644
--- a/drivers/pinctrl/pinctrl-cy8c95x0.c
+++ b/drivers/pinctrl/pinctrl-cy8c95x0.c
@@ -573,7 +573,8 @@ static int cy8c95x0_gpio_direction_input(struct gpio_chip *gc, unsigned int off)
ret = regmap_write_bits(chip->regmap, CY8C95X0_DRV_HIZ, bit, bit);
if (ret)
goto out;
- clear_bit(off, chip->push_pull);
+
+ __clear_bit(off, chip->push_pull);
}
out:
@@ -775,27 +776,27 @@ static int cy8c95x0_gpio_set_pincfg(struct cy8c95x0_pinctrl *chip,
switch (param) {
case PIN_CONFIG_BIAS_PULL_UP:
- clear_bit(off, chip->push_pull);
+ __clear_bit(off, chip->push_pull);
reg = CY8C95X0_DRV_PU;
break;
case PIN_CONFIG_BIAS_PULL_DOWN:
- clear_bit(off, chip->push_pull);
+ __clear_bit(off, chip->push_pull);
reg = CY8C95X0_DRV_PD;
break;
case PIN_CONFIG_BIAS_DISABLE:
- clear_bit(off, chip->push_pull);
+ __clear_bit(off, chip->push_pull);
reg = CY8C95X0_DRV_HIZ;
break;
case PIN_CONFIG_DRIVE_OPEN_DRAIN:
- clear_bit(off, chip->push_pull);
+ __clear_bit(off, chip->push_pull);
reg = CY8C95X0_DRV_ODL;
break;
case PIN_CONFIG_DRIVE_OPEN_SOURCE:
- clear_bit(off, chip->push_pull);
+ __clear_bit(off, chip->push_pull);
reg = CY8C95X0_DRV_ODH;
break;
case PIN_CONFIG_DRIVE_PUSH_PULL:
- set_bit(off, chip->push_pull);
+ __set_bit(off, chip->push_pull);
reg = CY8C95X0_DRV_PP_FAST;
break;
case PIN_CONFIG_MODE_PWM:
--
2.35.1
next prev parent reply other threads:[~2022-09-16 20:54 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-16 20:54 [PATCH v1 1/3] pinctrl: cy8c95x0: Lock register accesses in cy8c95x0_set_mux() Andy Shevchenko
2022-09-16 20:54 ` Andy Shevchenko [this message]
2022-09-16 20:54 ` [PATCH v1 3/3] pinctrl: cy8c95x0: Align function names in cy8c95x0_pmxops Andy Shevchenko
2022-09-20 9:22 ` [PATCH v1 1/3] pinctrl: cy8c95x0: Lock register accesses in cy8c95x0_set_mux() Linus Walleij
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