From: Rob Herring <robh@kernel.org>
To: Siarhei Volkau <lis8215@gmail.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Vinod Koul <vkoul@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Paul Cercueil <paul@crapouillou.net>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Linus Walleij <linus.walleij@linaro.org>,
Jiri Slaby <jirislaby@kernel.org>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org,
linux-serial@vger.kernel.org, linux-mips@vger.kernel.org,
linux-gpio@vger.kernel.org
Subject: Re: [PATCH 3/8] dt-bindings: clock: Add Ingenic JZ4755 CGU header
Date: Mon, 10 Oct 2022 08:05:19 -0500 [thread overview]
Message-ID: <20221010130519.GA488861-robh@kernel.org> (raw)
In-Reply-To: <20221009181338.2896660-4-lis8215@gmail.com>
On Sun, Oct 09, 2022 at 09:13:32PM +0300, Siarhei Volkau wrote:
> This will be used from the devicetree bindings to specify the clocks
> that should be obtained from the jz4755-cgu driver.
>
> Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
> ---
> .../dt-bindings/clock/ingenic,jz4755-cgu.h | 49 +++++++++++++++++++
> 1 file changed, 49 insertions(+)
> create mode 100644 include/dt-bindings/clock/ingenic,jz4755-cgu.h
>
> diff --git a/include/dt-bindings/clock/ingenic,jz4755-cgu.h b/include/dt-bindings/clock/ingenic,jz4755-cgu.h
> new file mode 100644
> index 000000000..32307f68c
> --- /dev/null
> +++ b/include/dt-bindings/clock/ingenic,jz4755-cgu.h
> @@ -0,0 +1,49 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
Dual license please.
> +/*
> + * This header provides clock numbers for the ingenic,jz4755-cgu DT binding.
> + */
> +
> +#ifndef __DT_BINDINGS_CLOCK_JZ4755_CGU_H__
> +#define __DT_BINDINGS_CLOCK_JZ4755_CGU_H__
> +
> +#define JZ4755_CLK_EXT 0
> +#define JZ4755_CLK_OSC32K 1
> +#define JZ4755_CLK_PLL 2
> +#define JZ4755_CLK_PLL_HALF 3
> +#define JZ4755_CLK_EXT_HALF 4
> +#define JZ4755_CLK_CCLK 5
> +#define JZ4755_CLK_H0CLK 6
> +#define JZ4755_CLK_PCLK 7
> +#define JZ4755_CLK_MCLK 8
> +#define JZ4755_CLK_H1CLK 9
> +#define JZ4755_CLK_UDC 10
> +#define JZ4755_CLK_LCD 11
> +#define JZ4755_CLK_UART0 12
> +#define JZ4755_CLK_UART1 13
> +#define JZ4755_CLK_UART2 14
> +#define JZ4755_CLK_DMA 15
> +#define JZ4755_CLK_MMC 16
> +#define JZ4755_CLK_MMC0 17
> +#define JZ4755_CLK_MMC1 18
> +#define JZ4755_CLK_EXT512 19
> +#define JZ4755_CLK_RTC 20
> +#define JZ4755_CLK_UDC_PHY 21
> +#define JZ4755_CLK_I2S 22
> +#define JZ4755_CLK_SPI 23
> +#define JZ4755_CLK_AIC 24
> +#define JZ4755_CLK_ADC 25
> +#define JZ4755_CLK_TCU 26
> +#define JZ4755_CLK_BCH 27
> +#define JZ4755_CLK_I2C 28
> +#define JZ4755_CLK_TVE 29
> +#define JZ4755_CLK_CIM 30
> +#define JZ4755_CLK_AUX_CPU 31
> +#define JZ4755_CLK_AHB1 32
> +#define JZ4755_CLK_IDCT 33
> +#define JZ4755_CLK_DB 34
> +#define JZ4755_CLK_ME 35
> +#define JZ4755_CLK_MC 36
> +#define JZ4755_CLK_TSSI 37
> +#define JZ4755_CLK_IPU 38
> +
> +#endif /* __DT_BINDINGS_CLOCK_JZ4755_CGU_H__ */
> --
> 2.36.1
>
>
next prev parent reply other threads:[~2022-10-10 13:05 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-09 18:13 [PATCH 0/8] MIPS: ingenic: Add support for the JZ4755 SoC Siarhei Volkau
2022-10-09 18:13 ` [PATCH 1/8] dt-bindings: " Siarhei Volkau
2022-10-10 14:53 ` Krzysztof Kozlowski
2022-10-10 20:18 ` Siarhei Volkau
2022-10-11 12:08 ` Krzysztof Kozlowski
2022-10-13 9:03 ` Paul Cercueil
2022-10-09 18:13 ` [PATCH 2/8] MIPS: ingenic: add new machine type MACH_JZ4755 Siarhei Volkau
2022-10-09 18:13 ` [PATCH 3/8] dt-bindings: clock: Add Ingenic JZ4755 CGU header Siarhei Volkau
2022-10-10 13:05 ` Rob Herring [this message]
2022-10-09 18:13 ` [PATCH 4/8] clk: Add Ingenic JZ4755 CGU driver Siarhei Volkau
2022-10-10 19:24 ` kernel test robot
2022-10-09 18:13 ` [PATCH 5/8] pinctrl: ingenic: JZ4755 minor bug fixes Siarhei Volkau
2022-10-17 9:46 ` Linus Walleij
2022-10-09 18:13 ` [PATCH 6/8] dmaengine: JZ4780: Add support for the JZ4755 Siarhei Volkau
2022-10-09 18:13 ` [PATCH 7/8] serial: 8250/ingenic: Add support for the JZ4750/JZ4755 SoCs Siarhei Volkau
2022-10-09 22:28 ` kernel test robot
2022-10-13 6:37 ` Siarhei Volkau
2022-10-13 6:46 ` Arnd Bergmann
2022-10-13 9:17 ` Paul Cercueil
2022-10-13 18:56 ` Siarhei Volkau
2022-10-16 18:39 ` Siarhei Volkau
2022-10-17 9:31 ` Paul Cercueil
2022-10-19 15:19 ` Siarhei Volkau
2022-10-10 16:12 ` kernel test robot
2022-10-10 20:20 ` Greg Kroah-Hartman
2022-10-11 18:38 ` Siarhei Volkau
2022-10-10 21:39 ` kernel test robot
2022-10-09 18:13 ` [PATCH 8/8] MIPS: DTS: Ingenic: Add support for the JZ4755 SoC Siarhei Volkau
2022-10-10 14:54 ` Krzysztof Kozlowski
2022-10-10 20:00 ` Siarhei Volkau
2022-10-11 12:09 ` Krzysztof Kozlowski
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20221010130519.GA488861-robh@kernel.org \
--to=robh@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dmaengine@vger.kernel.org \
--cc=gregkh@linuxfoundation.org \
--cc=jirislaby@kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linus.walleij@linaro.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@vger.kernel.org \
--cc=linux-serial@vger.kernel.org \
--cc=lis8215@gmail.com \
--cc=mturquette@baylibre.com \
--cc=paul@crapouillou.net \
--cc=sboyd@kernel.org \
--cc=tsbogend@alpha.franken.de \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).