From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: "Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Hans de Goede" <hdegoede@redhat.com>,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
"Thierry Reding" <thierry.reding@gmail.com>,
linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
linux-pwm@vger.kernel.org
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>,
Andy Shevchenko <andy@kernel.org>,
Linus Walleij <linus.walleij@linaro.org>
Subject: [PATCH v1 6/6] pinctrl: intel: Enumerate PWM device when community has a capabilitty
Date: Tue, 1 Nov 2022 17:56:42 +0200 [thread overview]
Message-ID: <20221101155642.52575-7-andriy.shevchenko@linux.intel.com> (raw)
In-Reply-To: <20221101155642.52575-1-andriy.shevchenko@linux.intel.com>
Some of the Communities may have PWM capability. In such cases,
enumerate PWM device via respective driver. User is still responsible
for setting correct pin muxing for the line that needs to output the
signal.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/pinctrl/intel/pinctrl-intel.c | 29 +++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
index e17d1318b913..fe5bf2184cbf 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.c
+++ b/drivers/pinctrl/intel/pinctrl-intel.c
@@ -24,6 +24,8 @@
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
+#include <linux/platform_data/x86/pwm-lpss.h>
+
#include "../core.h"
#include "pinctrl-intel.h"
@@ -49,6 +51,8 @@
#define PADOWN_MASK(p) (GENMASK(3, 0) << PADOWN_SHIFT(p))
#define PADOWN_GPP(p) ((p) / 8)
+#define PWMC 0x204
+
/* Offset from pad_regs */
#define PADCFG0 0x000
#define PADCFG0_RXEVCFG_SHIFT 25
@@ -1494,6 +1498,27 @@ static int intel_pinctrl_pm_init(struct intel_pinctrl *pctrl)
return 0;
}
+static int intel_pinctrl_probe_pwm(struct intel_pinctrl *pctrl,
+ struct intel_community *community)
+{
+ static const struct pwm_lpss_boardinfo info = {
+ .clk_rate = 19200000,
+ .npwm = 1,
+ .base_unit_bits = 22,
+ .bypass = true,
+ };
+ struct pwm_lpss_chip *pwm;
+
+ if (!(community->features & PINCTRL_FEATURE_PWM))
+ return 0;
+
+ pwm = pwm_lpss_probe(pctrl->dev, community->regs + PWMC, &info);
+ if (IS_ERR(pwm) && PTR_ERR(pwm) != -ENODEV)
+ return PTR_ERR(pwm);
+
+ return 0;
+}
+
int intel_pinctrl_probe(struct platform_device *pdev,
const struct intel_pinctrl_soc_data *soc_data)
{
@@ -1592,6 +1617,10 @@ int intel_pinctrl_probe(struct platform_device *pdev,
ret = intel_pinctrl_add_padgroups_by_size(pctrl, community);
if (ret)
return ret;
+
+ ret = intel_pinctrl_probe_pwm(pctrl, community);
+ if (ret)
+ return ret;
}
irq = platform_get_irq(pdev, 0);
--
2.35.1
next prev parent reply other threads:[~2022-11-01 15:56 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-01 15:56 [PATCH v1 0/6] pinctrl: intel: Enable PWM optional feature Andy Shevchenko
2022-11-01 15:56 ` [PATCH v1 1/6] pwm: Add a stub for devm_pwmchip_add() Andy Shevchenko
2022-11-01 15:56 ` [PATCH v1 2/6] pwm: lpss: Rename MAX_PWMS --> LPSS_MAX_PWMS Andy Shevchenko
2022-11-01 15:56 ` [PATCH v1 3/6] pwm: lpss: Include headers we are direct user of Andy Shevchenko
2022-11-01 15:56 ` [PATCH v1 4/6] pwm: lpss: Allow other drivers to enable PWM LPSS Andy Shevchenko
2022-11-01 15:56 ` [PATCH v1 5/6] pwm: lpss: Add pwm_lpss_probe() stub Andy Shevchenko
2022-11-01 15:56 ` Andy Shevchenko [this message]
2022-11-02 12:19 ` [PATCH v1 0/6] pinctrl: intel: Enable PWM optional feature Mika Westerberg
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