From: Linus Walleij <linus.walleij@linaro.org>
To: Mun Yew Tham <mun.yew.tham@intel.com>,
Bartosz Golaszewski <brgl@bgdev.pl>,
Joel Stanley <joel@jms.id.au>, Andrew Jeffery <andrew@aj.id.au>,
Alban Bedel <albeu@free.fr>, Orson Zhai <orsonzhai@gmail.com>,
Baolin Wang <baolin.wang@linux.alibaba.com>,
Chunyan Zhang <zhang.lyra@gmail.com>,
Jay Fang <f.fangjian@huawei.com>,
Daniel Palmer <daniel@thingy.jp>,
Romain Perier <romain.perier@gmail.com>,
Santosh Shilimkar <ssantosh@kernel.org>,
Kevin Hilman <khilman@kernel.org>,
William Breathitt Gray <william.gray@linaro.org>
Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org,
Linus Walleij <linus.walleij@linaro.org>,
Marc Zyngier <maz@kernel.org>
Subject: [PATCH v2 03/16] gpio: aspeed: Convert to immutable irq_chip
Date: Tue, 07 Mar 2023 14:04:45 +0100 [thread overview]
Message-ID: <20230215-immutable-chips-v2-3-d6b0e3f2d991@linaro.org> (raw)
In-Reply-To: <20230215-immutable-chips-v2-0-d6b0e3f2d991@linaro.org>
Convert the driver to immutable irq-chip with a bit of
intuition.
Cc: Marc Zyngier <maz@kernel.org>
Tested-by: Joel Stanley <joel@jms.id.au>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/gpio/gpio-aspeed.c | 44 ++++++++++++++++++++++++++++++++++++++------
1 file changed, 38 insertions(+), 6 deletions(-)
diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c
index a94da80d3a95..9c4852de2733 100644
--- a/drivers/gpio/gpio-aspeed.c
+++ b/drivers/gpio/gpio-aspeed.c
@@ -15,6 +15,7 @@
#include <linux/module.h>
#include <linux/pinctrl/consumer.h>
#include <linux/platform_device.h>
+#include <linux/seq_file.h>
#include <linux/spinlock.h>
#include <linux/string.h>
@@ -53,7 +54,7 @@ struct aspeed_gpio_config {
*/
struct aspeed_gpio {
struct gpio_chip chip;
- struct irq_chip irqc;
+ struct device *dev;
raw_spinlock_t lock;
void __iomem *base;
int irq;
@@ -566,6 +567,10 @@ static void aspeed_gpio_irq_set_mask(struct irq_data *d, bool set)
addr = bank_reg(gpio, bank, reg_irq_enable);
+ /* Unmasking the IRQ */
+ if (set)
+ gpiochip_enable_irq(&gpio->chip, irqd_to_hwirq(d));
+
raw_spin_lock_irqsave(&gpio->lock, flags);
copro = aspeed_gpio_copro_request(gpio, offset);
@@ -579,6 +584,10 @@ static void aspeed_gpio_irq_set_mask(struct irq_data *d, bool set)
if (copro)
aspeed_gpio_copro_release(gpio, offset);
raw_spin_unlock_irqrestore(&gpio->lock, flags);
+
+ /* Masking the IRQ */
+ if (!set)
+ gpiochip_disable_irq(&gpio->chip, irqd_to_hwirq(d));
}
static void aspeed_gpio_irq_mask(struct irq_data *d)
@@ -1080,6 +1089,30 @@ int aspeed_gpio_copro_release_gpio(struct gpio_desc *desc)
}
EXPORT_SYMBOL_GPL(aspeed_gpio_copro_release_gpio);
+static void aspeed_gpio_irq_print_chip(struct irq_data *d, struct seq_file *p)
+{
+ const struct aspeed_gpio_bank *bank;
+ struct aspeed_gpio *gpio;
+ u32 bit;
+ int rc, offset;
+
+ rc = irqd_to_aspeed_gpio_data(d, &gpio, &bank, &bit, &offset);
+ if (rc)
+ return;
+
+ seq_printf(p, dev_name(gpio->dev));
+}
+
+static const struct irq_chip aspeed_gpio_irq_chip = {
+ .irq_ack = aspeed_gpio_irq_ack,
+ .irq_mask = aspeed_gpio_irq_mask,
+ .irq_unmask = aspeed_gpio_irq_unmask,
+ .irq_set_type = aspeed_gpio_set_type,
+ .irq_print_chip = aspeed_gpio_irq_print_chip,
+ .flags = IRQCHIP_IMMUTABLE,
+ GPIOCHIP_IRQ_RESOURCE_HELPERS,
+};
+
/*
* Any banks not specified in a struct aspeed_bank_props array are assumed to
* have the properties:
@@ -1149,6 +1182,8 @@ static int __init aspeed_gpio_probe(struct platform_device *pdev)
if (IS_ERR(gpio->base))
return PTR_ERR(gpio->base);
+ gpio->dev = &pdev->dev;
+
raw_spin_lock_init(&gpio->lock);
gpio_id = of_match_node(aspeed_gpio_of_table, pdev->dev.of_node);
@@ -1208,12 +1243,9 @@ static int __init aspeed_gpio_probe(struct platform_device *pdev)
gpio->irq = rc;
girq = &gpio->chip.irq;
- girq->chip = &gpio->irqc;
+ gpio_irq_chip_set_chip(girq, &aspeed_gpio_irq_chip);
girq->chip->name = dev_name(&pdev->dev);
- girq->chip->irq_ack = aspeed_gpio_irq_ack;
- girq->chip->irq_mask = aspeed_gpio_irq_mask;
- girq->chip->irq_unmask = aspeed_gpio_irq_unmask;
- girq->chip->irq_set_type = aspeed_gpio_set_type;
+
girq->parent_handler = aspeed_gpio_irq_handler;
girq->num_parents = 1;
girq->parents = devm_kcalloc(&pdev->dev, 1,
--
2.34.1
next prev parent reply other threads:[~2023-03-07 13:05 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-07 13:04 [PATCH v2 00/16] Mass convert GPIO IRQ chips to be immutable Linus Walleij
2023-03-07 13:04 ` [PATCH v2 01/16] gpio: altera: Convert to immutable irq_chip Linus Walleij
2023-03-07 13:04 ` [PATCH v2 02/16] gpio: adnp: " Linus Walleij
2023-03-07 13:04 ` Linus Walleij [this message]
2023-03-08 1:21 ` [PATCH v2 03/16] gpio: aspeed: " Joel Stanley
2023-03-08 12:13 ` Linus Walleij
2023-03-08 13:23 ` Marc Zyngier
2023-03-08 21:48 ` Linus Walleij
2023-03-07 13:04 ` [PATCH v2 04/16] gpio: aspeed-sgpio: " Linus Walleij
2023-03-07 13:04 ` [PATCH v2 05/16] gpio: ath79: " Linus Walleij
2023-03-07 13:04 ` [PATCH v2 06/16] gpio: cadence: " Linus Walleij
2023-03-07 13:04 ` [PATCH v2 07/16] gpio: hisi: " Linus Walleij
2023-03-07 13:04 ` [PATCH v2 08/16] gpio: hlwd: " Linus Walleij
2023-03-07 13:04 ` [PATCH v2 09/16] gpio: idt3243x: " Linus Walleij
2023-03-07 13:04 ` [PATCH v2 10/16] gpio: msc313: " Linus Walleij
2023-03-07 13:04 ` [PATCH v2 11/16] gpio: mlxbf2: " Linus Walleij
2023-03-07 13:04 ` [PATCH v2 12/16] gpio: max732x: " Linus Walleij
2023-03-07 13:04 ` [PATCH v2 13/16] gpio: omap: Drop irq_base Linus Walleij
2023-03-07 13:04 ` [PATCH v2 14/16] gpio: omap: Convert to immutable irq_chip Linus Walleij
2023-03-07 13:04 ` [PATCH v2 15/16] gpio: pci-idio-16: " Linus Walleij
2023-03-07 13:04 ` [PATCH v2 16/16] gpio: pcie-idio-24: " Linus Walleij
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230215-immutable-chips-v2-3-d6b0e3f2d991@linaro.org \
--to=linus.walleij@linaro.org \
--cc=albeu@free.fr \
--cc=andrew@aj.id.au \
--cc=baolin.wang@linux.alibaba.com \
--cc=brgl@bgdev.pl \
--cc=daniel@thingy.jp \
--cc=f.fangjian@huawei.com \
--cc=joel@jms.id.au \
--cc=khilman@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-aspeed@lists.ozlabs.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-omap@vger.kernel.org \
--cc=maz@kernel.org \
--cc=mun.yew.tham@intel.com \
--cc=orsonzhai@gmail.com \
--cc=romain.perier@gmail.com \
--cc=ssantosh@kernel.org \
--cc=william.gray@linaro.org \
--cc=zhang.lyra@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).