From: kernel test robot <lkp@intel.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>,
Linus Walleij <linus.walleij@linaro.org>
Cc: oe-kbuild-all@lists.linux.dev, linux-renesas-soc@vger.kernel.org,
linux-gpio@vger.kernel.org,
Geert Uytterhoeven <geert+renesas@glider.be>
Subject: Re: [PATCH 3/8] pinctrl: renesas: Add support for 1.8V/2.5V I/O voltage levels
Date: Thu, 9 Mar 2023 16:28:49 +0800 [thread overview]
Message-ID: <202303091612.UKr8Fhos-lkp@intel.com> (raw)
In-Reply-To: <0c04925457bf3f7e78e7e3851528d9a4c29246da.1678271030.git.geert+renesas@glider.be>
Hi Geert,
I love your patch! Yet something to improve:
[auto build test ERROR on geert-renesas-drivers/renesas-pinctrl]
[also build test ERROR on linusw-pinctrl/devel linusw-pinctrl/for-next linus/master v6.3-rc1 next-20230309]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Geert-Uytterhoeven/pinctrl-renesas-r8a77995-Retain-POCCTRL0-register-across-suspend-resume/20230308-212328
base: https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git renesas-pinctrl
patch link: https://lore.kernel.org/r/0c04925457bf3f7e78e7e3851528d9a4c29246da.1678271030.git.geert%2Brenesas%40glider.be
patch subject: [PATCH 3/8] pinctrl: renesas: Add support for 1.8V/2.5V I/O voltage levels
config: nios2-randconfig-r004-20230309 (https://download.01.org/0day-ci/archive/20230309/202303091612.UKr8Fhos-lkp@intel.com/config)
compiler: nios2-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/513932515f943c5987c5a214520f6875cd507c3e
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Geert-Uytterhoeven/pinctrl-renesas-r8a77995-Retain-POCCTRL0-register-across-suspend-resume/20230308-212328
git checkout 513932515f943c5987c5a214520f6875cd507c3e
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=nios2 olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=nios2 SHELL=/bin/bash drivers/pinctrl/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Link: https://lore.kernel.org/oe-kbuild-all/202303091612.UKr8Fhos-lkp@intel.com/
All errors (new ones prefixed by >>):
In file included from drivers/pinctrl/renesas/pfc-r8a77950.c:11:
>> drivers/pinctrl/renesas/pfc-r8a77950.c:19:48: error: 'SH_PFC_PIN_CFG_IO_VOLTAGE' undeclared here (not in a function); did you mean 'SH_PFC_PIN_CFG_IO_VOLTAGE_MASK'?
19 | PORT_GP_CFG_12(3, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \
| ^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/renesas/sh_pfc.h:620:20: note: in definition of macro '_GP_GPIO'
620 | .configs = cfg, \
| ^~~
drivers/pinctrl/renesas/sh_pfc.h:447:9: note: in expansion of macro 'PORT_GP_CFG_1'
447 | PORT_GP_CFG_1(bank, 0, fn, sfx, cfg), \
| ^~~~~~~~~~~~~
drivers/pinctrl/renesas/sh_pfc.h:452:9: note: in expansion of macro 'PORT_GP_CFG_2'
452 | PORT_GP_CFG_2(bank, fn, sfx, cfg), \
| ^~~~~~~~~~~~~
drivers/pinctrl/renesas/sh_pfc.h:458:9: note: in expansion of macro 'PORT_GP_CFG_4'
458 | PORT_GP_CFG_4(bank, fn, sfx, cfg), \
| ^~~~~~~~~~~~~
drivers/pinctrl/renesas/sh_pfc.h:464:9: note: in expansion of macro 'PORT_GP_CFG_6'
464 | PORT_GP_CFG_6(bank, fn, sfx, cfg), \
| ^~~~~~~~~~~~~
drivers/pinctrl/renesas/sh_pfc.h:469:9: note: in expansion of macro 'PORT_GP_CFG_7'
469 | PORT_GP_CFG_7(bank, fn, sfx, cfg), \
| ^~~~~~~~~~~~~
drivers/pinctrl/renesas/sh_pfc.h:474:9: note: in expansion of macro 'PORT_GP_CFG_8'
474 | PORT_GP_CFG_8(bank, fn, sfx, cfg), \
| ^~~~~~~~~~~~~
drivers/pinctrl/renesas/sh_pfc.h:479:9: note: in expansion of macro 'PORT_GP_CFG_9'
479 | PORT_GP_CFG_9(bank, fn, sfx, cfg), \
| ^~~~~~~~~~~~~
drivers/pinctrl/renesas/sh_pfc.h:484:9: note: in expansion of macro 'PORT_GP_CFG_10'
484 | PORT_GP_CFG_10(bank, fn, sfx, cfg), \
| ^~~~~~~~~~~~~~
drivers/pinctrl/renesas/sh_pfc.h:489:9: note: in expansion of macro 'PORT_GP_CFG_11'
489 | PORT_GP_CFG_11(bank, fn, sfx, cfg), \
| ^~~~~~~~~~~~~~
drivers/pinctrl/renesas/pfc-r8a77950.c:19:9: note: in expansion of macro 'PORT_GP_CFG_12'
19 | PORT_GP_CFG_12(3, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \
| ^~~~~~~~~~~~~~
drivers/pinctrl/renesas/sh_pfc.h:622:41: note: in expansion of macro 'CPU_ALL_GP'
622 | #define PINMUX_GPIO_GP_ALL() CPU_ALL_GP(_GP_GPIO, unused)
| ^~~~~~~~~~
drivers/pinctrl/renesas/pfc-r8a77950.c:1502:9: note: in expansion of macro 'PINMUX_GPIO_GP_ALL'
1502 | PINMUX_GPIO_GP_ALL(),
| ^~~~~~~~~~~~~~~~~~
vim +19 drivers/pinctrl/renesas/pfc-r8a77950.c
b205914c8f822e drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c Geert Uytterhoeven 2016-10-03 14
bd79c92039f117 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c Geert Uytterhoeven 2019-03-21 15 #define CPU_ALL_GP(fn, sfx) \
b205914c8f822e drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c Geert Uytterhoeven 2016-10-03 16 PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \
b205914c8f822e drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c Geert Uytterhoeven 2016-10-03 17 PORT_GP_CFG_28(1, fn, sfx, CFG_FLAGS), \
b205914c8f822e drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c Geert Uytterhoeven 2016-10-03 18 PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS), \
b205914c8f822e drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c Geert Uytterhoeven 2016-10-03 @19 PORT_GP_CFG_12(3, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \
b205914c8f822e drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c Geert Uytterhoeven 2016-10-03 20 PORT_GP_CFG_1(3, 12, fn, sfx, CFG_FLAGS), \
b205914c8f822e drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c Geert Uytterhoeven 2016-10-03 21 PORT_GP_CFG_1(3, 13, fn, sfx, CFG_FLAGS), \
b205914c8f822e drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c Geert Uytterhoeven 2016-10-03 22 PORT_GP_CFG_1(3, 14, fn, sfx, CFG_FLAGS), \
b205914c8f822e drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c Geert Uytterhoeven 2016-10-03 23 PORT_GP_CFG_1(3, 15, fn, sfx, CFG_FLAGS), \
b205914c8f822e drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c Geert Uytterhoeven 2016-10-03 24 PORT_GP_CFG_18(4, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \
b205914c8f822e drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c Geert Uytterhoeven 2016-10-03 25 PORT_GP_CFG_26(5, fn, sfx, CFG_FLAGS), \
b205914c8f822e drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c Geert Uytterhoeven 2016-10-03 26 PORT_GP_CFG_32(6, fn, sfx, CFG_FLAGS), \
b205914c8f822e drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c Geert Uytterhoeven 2016-10-03 27 PORT_GP_CFG_4(7, fn, sfx, CFG_FLAGS)
4f062bcb588972 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c Geert Uytterhoeven 2019-01-15 28
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests
next prev parent reply other threads:[~2023-03-09 8:31 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-08 10:42 [PATCH 0/8] pinctrl: renesas: rcar: power-source improvements Geert Uytterhoeven
2023-03-08 10:42 ` [PATCH 1/8] pinctrl: renesas: r8a77995: Retain POCCTRL0 register across suspend/resume Geert Uytterhoeven
2023-03-08 10:42 ` [PATCH 2/8] pinctrl: renesas: rcar: Phase out old SH_PFC_PIN_CFG_IO_VOLTAGE flag Geert Uytterhoeven
2023-03-08 10:42 ` [PATCH 3/8] pinctrl: renesas: Add support for 1.8V/2.5V I/O voltage levels Geert Uytterhoeven
2023-03-09 8:28 ` kernel test robot [this message]
2023-03-09 8:31 ` Geert Uytterhoeven
2023-03-09 12:56 ` kernel test robot
2023-03-08 10:42 ` [PATCH 4/8] pinctrl: renesas: r8a77970: Add support for AVB power-source Geert Uytterhoeven
2023-03-08 10:42 ` [PATCH 5/8] pinctrl: renesas: r8a77980: Add support for AVB/GE power-sources Geert Uytterhoeven
2023-03-08 10:42 ` [PATCH 6/8] pinctrl: renesas: r8a77990: Add support for AVB power-source Geert Uytterhoeven
2023-03-08 10:42 ` [PATCH 7/8] pinctrl: renesas: r8a77995: " Geert Uytterhoeven
2023-03-08 10:42 ` [PATCH 8/8] pinctrl: renesas: r8a779g0: Add support for AVB/TSN power-sources Geert Uytterhoeven
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=202303091612.UKr8Fhos-lkp@intel.com \
--to=lkp@intel.com \
--cc=geert+renesas@glider.be \
--cc=linus.walleij@linaro.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=oe-kbuild-all@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).