From: Michael Walle <michael@walle.cc>
To: vaibhaavram.tl@microchip.com
Cc: Tharunkumar.Pasumarthi@microchip.com,
UNGLinuxDriver@microchip.com, arnd@arndb.de,
gregkh@linuxfoundation.org, linux-gpio@vger.kernel.org,
linux-kernel@vger.kernel.org,
Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
Michael Walle <michael@walle.cc>
Subject: Re: [PATCH v8 char-misc-next 3/5] misc: microchip: pci1xxxx: Add EEPROM Functionality to read and write into EEPROM bin sysfs
Date: Thu, 30 Mar 2023 11:51:40 +0200 [thread overview]
Message-ID: <20230330095140.3384441-1-michael@walle.cc> (raw)
In-Reply-To: <f999539280139b7085721803f12f836c201edf20.camel@microchip.com>
[First, please CC people who did comments on previous versions.]
> > > Microchip's pci1xxxx is an unmanaged PCIe3.1a switch for consumer,
> > > industrial, and automotive applications. This switch integrates OTP
> > > and EEPROM to enable customization of the part in the field.
> > > This patch adds EEPROM functionality to support the same.
> >
> > Again, why not use the in-kernel eeprom api instead?
> Unlike other in-Kernel EEPROM APIs, this EEPROM is not accessible
> through any of the i2c/spi buses available to the kernel.
I fail to see how this matters. NVMEM has a generic read/write callback.
There is no dependency on I2C or SPI. Again, you should look into nvmem.
And it should be perfectly fine to use nvmem without nvmem cells at all.
With CONFIG_NVMEM_SYSFS you should get a "nvmem" binary file in sysfs.
Wit config->compat set (although I don't know if that is recommended) you
should get an "eeprom" binary file in sysfs.
> It is only accessible through the register interface available in the
> EEPROM controller of the PCI1XXXX device.
-michael
next prev parent reply other threads:[~2023-03-30 9:53 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20230328144008.4113-1-vaibhaavram.tl@microchip.com>
[not found] ` <20230328144008.4113-2-vaibhaavram.tl@microchip.com>
2023-03-29 9:59 ` [PATCH v8 char-misc-next 1/5] misc: microchip: pci1xxxx: Fix error handling path in probe function Greg KH
2023-03-30 5:19 ` VaibhaavRam.TL
[not found] ` <20230328144008.4113-3-vaibhaavram.tl@microchip.com>
2023-03-29 10:01 ` [PATCH v8 char-misc-next 2/5] misc: microchip: pci1xxxx: Add OTP Functionality to read and write into OTP bin sysfs Greg KH
2023-03-30 5:27 ` VaibhaavRam.TL
[not found] ` <20230328144008.4113-4-vaibhaavram.tl@microchip.com>
2023-03-29 10:01 ` [PATCH v8 char-misc-next 3/5] misc: microchip: pci1xxxx: Add EEPROM Functionality to read and write into EEPROM " Greg KH
2023-03-30 5:28 ` VaibhaavRam.TL
2023-03-30 7:57 ` Greg KH
2023-03-30 9:51 ` Michael Walle [this message]
2023-03-30 17:21 ` Kumaravel.Thiagarajan
[not found] ` <20230328144008.4113-5-vaibhaavram.tl@microchip.com>
2023-03-29 10:02 ` [PATCH v8 char-misc-next 4/5] misc: microchip: pci1xxxx: Load auxiliary driver for OTP/EEPROM auxiliary device Greg KH
2023-03-30 5:29 ` VaibhaavRam.TL
[not found] ` <20230328144008.4113-6-vaibhaavram.tl@microchip.com>
2023-03-29 10:03 ` [PATCH v8 char-misc-next 5/5] misc: microchip: pci1xxxx: Add documentation for sysfs bin attributes Greg KH
2023-03-30 5:37 ` VaibhaavRam.TL
2023-03-29 10:03 ` [PATCH v8 char-misc-next 0/5] Fix error handling in probe Greg KH
2023-03-30 5:38 ` VaibhaavRam.TL
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