rockchip rk3328 pinctrl unable to change gpio function of pins defined in rk3328_mux_recalced_data

rockchip rk3328 pinctrl unable to change gpio function of pins defined in rk3328_mux_recalced_data

[Kernel.org Bugbot]

antwain.schneider writes via Kernel.org Bugzilla:

rock64 exposes i2s1 on a secondary 22 pin header on the machine, this includes gpio2b7
since i don't care about i2s and those pins would be more valuable as gpios, i explicitly disabled i2s1 in the device tree
i set gpio2b7 as a cs-gpio but it wasn't working, eventually i got bold and actually started looking at the grf in memory

ma -k /dev/gpiomem dd 0x28 4
00000020  -------- --------  00000001

no matter how many i2s1 things i disabled or removed from the dtb, GRF_GPIO2BH_IOMUX always read 00000001, meaning i2s1_mclk seems hardcoded
eventually i found the description in commit 3818e4a7678ea70508b6b6e72a4cbf445e1e7dfa and realized gpio2b4 also gives me trouble
i feel this is a bug, but probably not important for a 6 year old chip

View: https://bugzilla.kernel.org/show_bug.cgi?id=217334#c0
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Kernel.org Bugzilla (peebz 0.1)

Re: rockchip rk3328 pinctrl unable to change gpio function of pins defined in rk3328_mux_recalced_data

[Kernel.org Bugbot]

antwain.schneider writes via Kernel.org Bugzilla:

so here's as best as i understand what's going on

in pinctrl-rockchip.c

rk3328_pin_banks

PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0, IOMUX_WIDTH_3BIT, IOMUX_WIDTH_3BIT, 0),

it states that gpio2b is 3 bits per gpio, but if you look at the rk3328 trm, it's only 1 gpio pin in bank 2 that is three bits, e.g.

/* GRF_GPIO2BL_IOMUX 2'bxxx */
/* 2b0 */	"spi_clkm0", NULL, NULL,
/* 2b1 */	"spi_txdm0", NULL, NULL,
/* 2b2 */	"spi_rxdm0", NULL, NULL,
/* 2b3 */	"spi_csn0m0", NULL, NULL,
/* 2b4 */	"spi_csn1m0", "flash_vol_sel", NULL,
/* 2b5 */	"i2c2_sda", "tsadc_shut", NULL,
/* 2b6 */	"i2c2_scl", NULL, NULL,
/* GRF_GPIO2BH_IOMUX 3'bxxx */
/* 2b7 */	"i2s1_mclk", NULL, "tsp_syncm1", "cif_clkoutm1", NULL, NULL, NULL,

so by not adding addtional explicit 2 bit alignment adjustments to rk3328_mux_recalced_data, everything is 'slightly off'

david wu originally submitted the correct alignment on the initial patch[1], but it wasn't commited, but on the official rockchip linux fork, he readded the alignment in 2019[2]

so i request someone please add this back into the kernel

[1] https://lore.kernel.org/linux-rockchip/1485074286-7863-1-git-send-email-david.wu@rock-chips.com/
[2] https://github.com/rockchip-linux/kernel/commit/d69af8ab6534bb28c1556076f08d2a5ab4935d95

View: https://bugzilla.kernel.org/show_bug.cgi?id=217334#c1
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Kernel.org Bugzilla (peebz 0.1)

Re: rockchip rk3328 pinctrl unable to change gpio function of pins defined in rk3328_mux_recalced_data

[Kernel.org Bugbot]

antwain.schneider added an attachment on Kernel.org Bugzilla:

Created attachment 304169
the other half

missed from the 2019 patch is the recalculations for the gpio3b, e.g.

/* GRF_GPIO3BL_IOMUX 3'bxxx */
/* 3b0 */	"tsp_d4", "cif_data4", "spi_csn0m2", "i2s2_lrcktxm1", "usb3phy_debug8", "i2s2_lrckrxm1", NULL,
/* GRF_GPIO3BH_IOMUX 2'bxx */
/* 3b1 */	"tsp_d5m0", "cif_data5m", NULL,
/* 3b2 */	"tsp_d6m0", "cif_data6m", NULL,
/* 3b3 */	"tsp_d7m0", "cif_data7m", NULL,
/* 3b4 */	"card_clkm0", NULL, NULL,
/* 3b5 */	"card_rstm0", NULL, NULL,
/* 3b6 */	"card_detm0", NULL, NULL,
/* 3b7 */	"card_iom0", NULL, NULL,

so attached is the missing half of the initial correct recalculations in the modern format

File: rockchip-rk3328-pinctrl-gpio3b-recalc.diff (text/plain)
Size: 743.00 B
Link: https://bugzilla.kernel.org/attachment.cgi?id=304169
---
the other half

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Kernel.org Bugzilla (peebz 0.1)

Re: rockchip rk3328 pinctrl unable to change gpio function of pins defined in rk3328_mux_recalced_data

[Kernel.org Bugbot]

antwain.schneider added an attachment on Kernel.org Bugzilla:

Created attachment 304170
correct other half

sorry, off by 8 error :O

File: rockchip-rk3328-pinctrl-gpio3b-recalc.diff (text/plain)
Size: 749.00 B
Link: https://bugzilla.kernel.org/attachment.cgi?id=304170
---
correct other half

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Kernel.org Bugzilla (peebz 0.1)

Re: inux ockchip pio2b4 (pio2b5) pio2b7 roken GRF_PIO2BL_IOMUX GRF_PIO2BH_IOMUX 2bits 3bits pinctrl rk332_mux_ecalced_data

[Kernel.org Bugbot]

antwain.schneider added an attachment on Kernel.org Bugzilla:

Created attachment 305801
here is the page in the trm that describes the registers in question

if you can't read the pdf here is a png

File: 1.png (image/png)
Size: 4.24 MiB
Link: https://bugzilla.kernel.org/attachment.cgi?id=305801
---
here is the page in the trm that describes the registers in question

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