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From: Hugo Villeneuve <hugo@hugovil.com>
To: gregkh@linuxfoundation.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
	jirislaby@kernel.org, jringle@gridpoint.com,
	tomasz.mon@camlingroup.com, l.perczak@camlintechnologies.com
Cc: linux-serial@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, hugo@hugovil.com,
	linux-gpio@vger.kernel.org,
	Hugo Villeneuve <hvilleneuve@dimonoff.com>,
	Lech Perczak <lech.perczak@camlingroup.com>
Subject: [PATCH v6 9/9] serial: sc16is7xx: improve comments about variants
Date: Thu,  1 Jun 2023 16:18:44 -0400	[thread overview]
Message-ID: <20230601201844.3739926-10-hugo@hugovil.com> (raw)
In-Reply-To: <20230601201844.3739926-1-hugo@hugovil.com>

From: Hugo Villeneuve <hvilleneuve@dimonoff.com>

Replace 740/750/760 with generic terms like 74x/75x/76x to account for
variants like 741, 752 and 762.

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Lech Perczak <lech.perczak@camlingroup.com>
---
 drivers/tty/serial/sc16is7xx.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c
index 9b2d58023c55..59338f5ca180 100644
--- a/drivers/tty/serial/sc16is7xx.c
+++ b/drivers/tty/serial/sc16is7xx.c
@@ -223,7 +223,7 @@
  * trigger levels. Trigger levels from 4 characters to 60 characters are
  * available with a granularity of four.
  *
- * When the trigger level setting in TLR is zero, the SC16IS740/750/760 uses the
+ * When the trigger level setting in TLR is zero, the SC16IS74x/75x/76x uses the
  * trigger level setting defined in FCR. If TLR has non-zero trigger level value
  * the trigger level defined in FCR is discarded. This applies to both transmit
  * FIFO and receive FIFO trigger level setting.
@@ -234,7 +234,7 @@
 #define SC16IS7XX_TLR_TX_TRIGGER(words)	((((words) / 4) & 0x0f) << 0)
 #define SC16IS7XX_TLR_RX_TRIGGER(words)	((((words) / 4) & 0x0f) << 4)
 
-/* IOControl register bits (Only 750/760) */
+/* IOControl register bits (Only 75x/76x) */
 #define SC16IS7XX_IOCONTROL_LATCH_BIT	(1 << 0) /* Enable input latching */
 #define SC16IS7XX_IOCONTROL_MODEM_A_BIT	(1 << 1) /* Enable GPIO[7:4] as modem A pins */
 #define SC16IS7XX_IOCONTROL_MODEM_B_BIT	(1 << 2) /* Enable GPIO[3:0] as modem B pins */
@@ -249,9 +249,9 @@
 #define SC16IS7XX_EFCR_RTS_INVERT_BIT	(1 << 5) /* RTS output inversion */
 #define SC16IS7XX_EFCR_IRDA_MODE_BIT	(1 << 7) /* IrDA mode
 						  * 0 = rate upto 115.2 kbit/s
-						  *   - Only 750/760
+						  *   - Only 75x/76x
 						  * 1 = rate upto 1.152 Mbit/s
-						  *   - Only 760
+						  *   - Only 76x
 						  */
 
 /* EFR register bits */
-- 
2.30.2


      parent reply	other threads:[~2023-06-01 20:19 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-01 20:18 [PATCH v6 0/9] serial: sc16is7xx: fix GPIO regression and rs485 improvements Hugo Villeneuve
2023-06-01 20:18 ` [PATCH v6 1/9] serial: sc16is7xx: fix broken port 0 uart init Hugo Villeneuve
2023-06-01 20:18 ` [PATCH v6 2/9] serial: sc16is7xx: mark IOCONTROL register as volatile Hugo Villeneuve
2023-06-01 20:18 ` [PATCH v6 3/9] serial: sc16is7xx: refactor GPIO controller registration Hugo Villeneuve
2023-06-01 20:18 ` [PATCH v6 4/9] dt-bindings: sc16is7xx: Add property to change GPIO function Hugo Villeneuve
2023-06-01 20:18 ` [PATCH v6 5/9] serial: sc16is7xx: fix regression with GPIO configuration Hugo Villeneuve
2023-06-01 21:30   ` andy.shevchenko
2023-06-02  0:41     ` Hugo Villeneuve
2023-06-02  1:25       ` Hugo Villeneuve
2023-06-02 12:58         ` Andy Shevchenko
2023-06-02 13:06           ` Hugo Villeneuve
2023-06-01 20:18 ` [PATCH v6 6/9] serial: sc16is7xx: fix bug when first setting GPIO direction Hugo Villeneuve
2023-06-01 20:18 ` [PATCH v6 7/9] serial: sc16is7xx: add call to get rs485 DT flags and properties Hugo Villeneuve
2023-06-01 20:18 ` [PATCH v6 8/9] serial: sc16is7xx: add post reset delay Hugo Villeneuve
2023-06-01 20:18 ` Hugo Villeneuve [this message]

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