From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36104EE49A5 for ; Mon, 21 Aug 2023 20:44:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231373AbjHUUow (ORCPT ); Mon, 21 Aug 2023 16:44:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60826 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231416AbjHUUof (ORCPT ); Mon, 21 Aug 2023 16:44:35 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BFAA1E69; Mon, 21 Aug 2023 13:43:03 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 5557664B3A; Mon, 21 Aug 2023 20:43:03 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DB0D4C433C8; Mon, 21 Aug 2023 20:42:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692650582; bh=P41CM/OE8qR2Gp1s+g6+GSL1DglIHghUvEzQuODVkmc=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=UOml1bli7gpAXd/J8eSKV26mhi+K1Qkfswc3XkPFfbyVV5Ok3TQT7Z/JDWQop/uWz iS+AzrUyvjliyoAd40oHLcUxTl3RVeshK/tZDCSBTTmjLjZFcbUTIelydTK+L0T5Bb FnGg0AjSO+MjT4uimnJxVSXHlmf7jH81RZ2ftlfiGdC+6Gkq9RCuzblpSqczXAyY7+ qFazrV2lS835EOF2VaXPwPPwkGyt/0UVDM3uDcNL6gd3FN3KqTHJIdGvVMLudARvV2 rIavmg1onrMgqE+ej6mZc7Wwgp7yiXLGRsRhsWvWoohfvBlPZ9Svy2t977WWKD0mA/ 8PLW6le92tJ8g== Received: (nullmailer pid 2260072 invoked by uid 1000); Mon, 21 Aug 2023 20:42:58 -0000 Date: Mon, 21 Aug 2023 15:42:58 -0500 From: Rob Herring To: Christophe Leroy Cc: Herve Codina , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Linus Walleij , Qiang Zhao , Li Yang , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Shengjiu Wang , Xiubo Li , Fabio Estevam , Nicolin Chen , Randy Dunlap , netdev@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, alsa-devel@alsa-project.org, Thomas Petazzoni Subject: Re: [PATCH v4 06/28] dt-bindings: net: Add support for QMC HDLC Message-ID: <20230821204258.GA2253571-robh@kernel.org> References: <817d1418fa1e9e689375177bee4bdc68ceeab7be.1692376361.git.christophe.leroy@csgroup.eu> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <817d1418fa1e9e689375177bee4bdc68ceeab7be.1692376361.git.christophe.leroy@csgroup.eu> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On Fri, Aug 18, 2023 at 06:39:00PM +0200, Christophe Leroy wrote: > From: Herve Codina > > The QMC (QUICC mutichannel controller) is a controller present in some > PowerQUICC SoC such as MPC885. > The QMC HDLC uses the QMC controller to transfer HDLC data. > > Additionally, a framer can be connected to the QMC HDLC. > If present, this framer is the interface between the TDM bus used by the > QMC HDLC and the E1/T1 line. > The QMC HDLC can use this framer to get information about the E1/T1 line > and configure the E1/T1 line. > > Signed-off-by: Herve Codina > Signed-off-by: Christophe Leroy > --- > .../devicetree/bindings/net/fsl,qmc-hdlc.yaml | 46 +++++++++++++++++++ > 1 file changed, 46 insertions(+) > create mode 100644 Documentation/devicetree/bindings/net/fsl,qmc-hdlc.yaml > > diff --git a/Documentation/devicetree/bindings/net/fsl,qmc-hdlc.yaml b/Documentation/devicetree/bindings/net/fsl,qmc-hdlc.yaml > new file mode 100644 > index 000000000000..13f3572f0feb > --- /dev/null > +++ b/Documentation/devicetree/bindings/net/fsl,qmc-hdlc.yaml > @@ -0,0 +1,46 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/net/fsl,qmc-hdlc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Freescale/NXP QUICC Multichannel Controller (QMC) HDLC > + > +maintainers: > + - Herve Codina > + > +description: | Don't need '|' > + The QMC HDLC uses a QMC (QUICC Multichannel Controller) channel to transfer > + HDLC data. > + > +properties: > + compatible: > + const: fsl,qmc-hdlc > + > + fsl,qmc-chan: > + $ref: /schemas/types.yaml#/definitions/phandle-array > + items: > + - items: > + - description: phandle to QMC node > + - description: Channel number > + description: > + Should be a phandle/number pair. The phandle to QMC node and the QMC > + channel to use. > + > + framer: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + phandle to the framer node What's the framer? > + > +required: > + - compatible > + - fsl,qmc-chan > + > +additionalProperties: false > + > +examples: > + - | > + hdlc { > + compatible = "fsl,qmc-hdlc"; > + fsl,qmc-chan = <&qmc 16>; Where does this node live? QMC is this[1]? Why don't you just add the compatible to channel@10 in the QMC node? Rob [1] Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml