From: Herve Codina <herve.codina@bootlin.com>
To: Herve Codina <herve.codina@bootlin.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Andrew Lunn <andrew@lunn.ch>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>, Lee Jones <lee@kernel.org>,
Linus Walleij <linus.walleij@linaro.org>,
Qiang Zhao <qiang.zhao@nxp.com>, Li Yang <leoyang.li@nxp.com>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>, Jaroslav Kysela <perex@perex.cz>,
Takashi Iwai <tiwai@suse.com>,
Shengjiu Wang <shengjiu.wang@gmail.com>,
Xiubo Li <Xiubo.Lee@gmail.com>,
Fabio Estevam <festevam@gmail.com>,
Nicolin Chen <nicoleotsuka@gmail.com>,
Christophe Leroy <christophe.leroy@csgroup.eu>,
Randy Dunlap <rdunlap@infradead.org>
Cc: netdev@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
alsa-devel@alsa-project.org, Simon Horman <horms@kernel.org>,
Christophe JAILLET <christophe.jaillet@wanadoo.fr>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: [PATCH v5 18/31] soc: fsl: cpm1: qmc: Split Tx and Rx TSA entries setup
Date: Tue, 12 Sep 2023 12:13:52 +0200 [thread overview]
Message-ID: <20230912101352.225628-1-herve.codina@bootlin.com> (raw)
In-Reply-To: <20230912081527.208499-1-herve.codina@bootlin.com>
The Tx and Rx entries for a given channel are set in one function.
In order to modify Rx entries and Tx entries independently of one other,
split this function in one for the Rx part and one for the Tx part.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
drivers/soc/fsl/qe/qmc.c | 49 ++++++++++++++++++++++++++++------------
1 file changed, 35 insertions(+), 14 deletions(-)
diff --git a/drivers/soc/fsl/qe/qmc.c b/drivers/soc/fsl/qe/qmc.c
index 26cd7e1ccafc..eeceb81bf107 100644
--- a/drivers/soc/fsl/qe/qmc.c
+++ b/drivers/soc/fsl/qe/qmc.c
@@ -610,14 +610,14 @@ static int qmc_chan_setup_tsa_64rxtx(struct qmc_chan *chan, const struct tsa_ser
return 0;
}
-static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_serial_info *info,
- bool enable)
+static int qmc_chan_setup_tsa_32rx(struct qmc_chan *chan, const struct tsa_serial_info *info,
+ bool enable)
{
unsigned int i;
u16 curr;
u16 val;
- /* Use a Tx 32 entries table and a Rx 32 entries table */
+ /* Use a Rx 32 entries table */
val = QMC_TSA_VALID | QMC_TSA_MASK | QMC_TSA_CHANNEL(chan->id);
@@ -633,6 +633,30 @@ static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_
return -EBUSY;
}
}
+
+ /* Set entries based on Rx stuff */
+ for (i = 0; i < info->nb_rx_ts; i++) {
+ if (!(chan->rx_ts_mask & (((u64)1) << i)))
+ continue;
+
+ qmc_clrsetbits16(chan->qmc->scc_pram + QMC_GBL_TSATRX + (i * 2),
+ ~QMC_TSA_WRAP, enable ? val : 0x0000);
+ }
+
+ return 0;
+}
+
+static int qmc_chan_setup_tsa_32tx(struct qmc_chan *chan, const struct tsa_serial_info *info,
+ bool enable)
+{
+ unsigned int i;
+ u16 curr;
+ u16 val;
+
+ /* Use a Tx 32 entries table */
+
+ val = QMC_TSA_VALID | QMC_TSA_MASK | QMC_TSA_CHANNEL(chan->id);
+
/* Check entries based on Tx stuff */
for (i = 0; i < info->nb_tx_ts; i++) {
if (!(chan->tx_ts_mask & (((u64)1) << i)))
@@ -646,14 +670,6 @@ static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_
}
}
- /* Set entries based on Rx stuff */
- for (i = 0; i < info->nb_rx_ts; i++) {
- if (!(chan->rx_ts_mask & (((u64)1) << i)))
- continue;
-
- qmc_clrsetbits16(chan->qmc->scc_pram + QMC_GBL_TSATRX + (i * 2),
- ~QMC_TSA_WRAP, enable ? val : 0x0000);
- }
/* Set entries based on Tx stuff */
for (i = 0; i < info->nb_tx_ts; i++) {
if (!(chan->tx_ts_mask & (((u64)1) << i)))
@@ -680,9 +696,14 @@ static int qmc_chan_setup_tsa(struct qmc_chan *chan, bool enable)
* Setup one common 64 entries table or two 32 entries (one for Tx
* and one for Tx) according to assigned TS numbers.
*/
- return ((info.nb_tx_ts > 32) || (info.nb_rx_ts > 32)) ?
- qmc_chan_setup_tsa_64rxtx(chan, &info, enable) :
- qmc_chan_setup_tsa_32rx_32tx(chan, &info, enable);
+ if (info.nb_tx_ts > 32 || info.nb_rx_ts > 32)
+ return qmc_chan_setup_tsa_64rxtx(chan, &info, enable);
+
+ ret = qmc_chan_setup_tsa_32rx(chan, &info, enable);
+ if (ret)
+ return ret;
+
+ return qmc_chan_setup_tsa_32tx(chan, &info, enable);
}
static int qmc_chan_command(struct qmc_chan *chan, u8 qmc_opcode)
--
2.41.0
next prev parent reply other threads:[~2023-09-12 10:14 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-12 8:14 [PATCH v5 00/31] Add support for QMC HDLC, framer infrastructure and PEF2256 framer Herve Codina
2023-09-12 8:14 ` [PATCH v5 01/31] soc: fsl: cpm1: tsa: Fix __iomem addresses declaration Herve Codina
2023-09-12 8:14 ` [PATCH v5 02/31] soc: fsl: cpm1: qmc: " Herve Codina
2023-09-12 8:14 ` [PATCH v5 03/31] soc: fsl: cpm1: qmc: Fix rx channel reset Herve Codina
2023-09-12 8:14 ` [PATCH v5 04/31] soc: fsl: cpm1: qmc: Extend the API to provide Rx status Herve Codina
2023-09-12 8:14 ` [PATCH v5 05/31] soc: fsl: cpm1: qmc: Remove inline function specifiers Herve Codina
2023-09-12 8:14 ` [PATCH v5 06/31] dt-bindings: soc: fsl: cpm_qe: cpm1-scc-qmc: Fix example property name Herve Codina
2023-09-12 16:36 ` Conor Dooley
2023-09-12 8:14 ` [PATCH v5 07/31] dt-bindings: soc: fsl: cpm_qe: cpm1-scc-qmc: Add 'additionalProperties: false' in child nodes Herve Codina
2023-09-12 16:37 ` Conor Dooley
2023-09-12 18:23 ` Rob Herring
2023-09-12 10:10 ` [PATCH v5 08/31] dt-bindings: soc: fsl: cpm_qe: cpm1-scc-qmc: Add support for QMC HDLC Herve Codina
2023-09-12 17:21 ` Conor Dooley
2023-09-13 7:26 ` Herve Codina
2023-09-13 14:42 ` Conor Dooley
2023-09-13 14:52 ` Herve Codina
2023-09-13 14:56 ` Conor Dooley
2023-09-13 14:59 ` Conor Dooley
2023-09-18 7:42 ` Herve Codina
2023-09-12 10:11 ` [PATCH v5 09/31] soc: fsl: cpm1: qmc: Add support for child devices Herve Codina
2023-09-12 10:12 ` [PATCH v5 10/31] net: wan: Add support for QMC HDLC Herve Codina
2023-09-12 10:12 ` [PATCH v5 11/31] MAINTAINERS: Add the Freescale QMC HDLC driver entry Herve Codina
2023-09-12 10:13 ` [PATCH v5 12/31] soc: fsl: cpm1: qmc: Introduce available timeslots masks Herve Codina
2023-09-12 10:13 ` [PATCH v5 13/31] soc: fsl: cpm1: qmc: Rename qmc_setup_tsa* to qmc_init_tsa* Herve Codina
2023-09-12 10:13 ` [PATCH v5 14/31] soc: fsl: cpm1: qmc: Introduce qmc_chan_setup_tsa* Herve Codina
2023-09-12 10:13 ` [PATCH v5 15/31] soc: fsl: cpm1: qmc: Remove no more needed checks from qmc_check_chans() Herve Codina
2023-09-12 10:13 ` [PATCH v5 16/31] soc: fsl: cpm1: qmc: Check available timeslots in qmc_check_chans() Herve Codina
2023-09-12 10:13 ` [PATCH v5 17/31] soc: fsl: cpm1: qmc: Add support for disabling channel TSA entries Herve Codina
2023-09-12 10:13 ` Herve Codina [this message]
2023-09-12 10:14 ` [PATCH v5 19/31] soc: fsl: cpm1: qmc: Introduce is_tsa_64rxtx flag Herve Codina
2023-09-12 10:14 ` [PATCH v5 20/31] soc: fsl: cpm1: qmc: Handle timeslot entries at channel start() and stop() Herve Codina
2023-09-12 10:14 ` [PATCH v5 21/31] soc: fsl: cpm1: qmc: Remove timeslots handling from setup_chan() Herve Codina
2023-09-12 10:14 ` [PATCH v5 22/31] soc: fsl: cpm1: qmc: Introduce functions to change timeslots at runtime Herve Codina
2023-09-12 10:14 ` [PATCH v5 23/31] wan: qmc_hdlc: Add runtime timeslots changes support Herve Codina
2023-09-12 10:14 ` [PATCH v5 24/31] net: wan: Add framer framework support Herve Codina
2023-09-13 16:59 ` Mark Brown
2023-09-12 10:14 ` [PATCH v5 25/31] dt-bindings: net: Add the Lantiq PEF2256 E1/T1/J1 framer Herve Codina
2023-09-12 18:13 ` Conor Dooley
2023-09-12 18:49 ` Christophe Leroy
2023-09-18 7:49 ` Herve Codina
2023-09-18 8:02 ` Herve Codina
2023-09-21 8:45 ` Christophe Leroy
[not found] ` <20230912185405.GA1165807-robh@kernel.org>
2023-09-13 14:39 ` Conor Dooley
2023-09-12 10:14 ` [PATCH v5 26/31] mfd: core: Ensure disabled devices are skipped without aborting Herve Codina
2023-09-12 10:14 ` [PATCH v5 27/31] net: wan: framer: Add support for the Lantiq PEF2256 framer Herve Codina
2023-09-12 10:50 ` Linus Walleij
2023-09-12 10:15 ` [PATCH v5 28/31] pinctrl: Add support for the Lantic PEF2256 pinmux Herve Codina
2023-09-12 11:04 ` Linus Walleij
2023-09-12 14:31 ` Mark Brown
2023-09-12 21:04 ` Linus Walleij
2023-09-18 8:35 ` Herve Codina
2023-09-12 10:15 ` [PATCH v5 29/31] MAINTAINERS: Add the Lantiq PEF2256 driver entry Herve Codina
2023-09-12 11:05 ` Linus Walleij
2023-09-12 10:15 ` [PATCH v5 30/31] ASoC: codecs: Add support for the framer codec Herve Codina
2023-09-12 10:15 ` [PATCH v5 31/31] net: wan: fsl_qmc_hdlc: Add framer support Herve Codina
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