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* [PATCH] pinctrl: tegra: Display pin function in pinconf-groups
@ 2023-09-29 12:21 Thierry Reding
  2023-10-02  8:25 ` Luca Ceresoli
  2023-11-06 13:25 ` Linus Walleij
  0 siblings, 2 replies; 3+ messages in thread
From: Thierry Reding @ 2023-09-29 12:21 UTC (permalink / raw)
  To: Linus Walleij
  Cc: Jon Hunter, Prathamesh Shete, Luca Ceresoli, linux-gpio,
	linux-tegra

From: Thierry Reding <treding@nvidia.com>

The function that a pin is muxed to can be read from the top-level
pinctrl-maps debugfs file. However, this only reflects the values that
were specified in device tree, so they will only show deviations from
the hardware default setting. Display the current pinmux setting in the
per-controller pinconf-groups debugfs file along with the rest of the
per-pin configuration settings.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 drivers/pinctrl/tegra/pinctrl-tegra.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c
index a4002b430f0a..c9fd3910bb3b 100644
--- a/drivers/pinctrl/tegra/pinctrl-tegra.c
+++ b/drivers/pinctrl/tegra/pinctrl-tegra.c
@@ -639,6 +639,14 @@ static void tegra_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
 		seq_printf(s, "\n\t%s=%u",
 			   strip_prefix(cfg_params[i].property), val);
 	}
+
+	if (g->mux_reg >= 0) {
+		/* read pinmux function and dump to seq_file */
+		val = pmx_readl(pmx, g->mux_bank, g->mux_reg);
+		val = g->funcs[(val >> g->mux_bit) & 0x3];
+
+		seq_printf(s, "\n\tfunction=%s", pmx->functions[val].name);
+	}
 }
 
 static void tegra_pinconf_config_dbg_show(struct pinctrl_dev *pctldev,
-- 
2.42.0


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Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2023-09-29 12:21 [PATCH] pinctrl: tegra: Display pin function in pinconf-groups Thierry Reding
2023-10-02  8:25 ` Luca Ceresoli
2023-11-06 13:25 ` Linus Walleij

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