From: Guilherme Destefani <linux@destefani.eng.br>
To: linux-gpio@vger.kernel.org
Cc: brgl@bgdev.pl, steffen.kothe.gc1993@googlemail.com,
linus.walleij@linaro.org,
Guilherme Destefani <linux-gpio@destefani.eng.br>
Subject: [PATCH 1/1] GPIO support for Fintek family F819XX
Date: Thu, 21 Mar 2024 14:00:26 -0300 [thread overview]
Message-ID: <20240321170015.74544-2-linux@destefani.eng.br> (raw)
In-Reply-To: <20240321170015.74544-1-linux@destefani.eng.br>
From: Guilherme Destefani <linux-gpio@destefani.eng.br>
Both F81804 (64 pins, 30 gpios) and chips F81962/F81964/F81966/F81967
(128 pins, 80 gpios) share the same chip ID, but use a different gpio
mapping. Read the second serial device enable register and test for 0xff
was the recommended method suggested by the chip manufacturer to tell
apart both chips.
Signed-off-by: Guilherme Destefani <linux-gpio@destefani.eng.br>
---
drivers/gpio/gpio-f7188x.c | 28 ++++++++++++++++++++++++----
1 file changed, 24 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/gpio-f7188x.c b/drivers/gpio/gpio-f7188x.c
index 3875fd940ccb..819ea95fece6 100644
--- a/drivers/gpio/gpio-f7188x.c
+++ b/drivers/gpio/gpio-f7188x.c
@@ -40,10 +40,11 @@
#define SIO_F71889_ID 0x0909 /* F71889 chipset ID */
#define SIO_F71889A_ID 0x1005 /* F71889A chipset ID */
#define SIO_F81866_ID 0x1010 /* F81866 chipset ID */
-#define SIO_F81804_ID 0x1502 /* F81804 chipset ID, same for F81966 */
+#define SIO_F81804_F819XX_ID 0x1502 /* F81804 chipset ID, same for F81966 */
#define SIO_F81865_ID 0x0704 /* F81865 chipset ID */
#define SIO_LD_GPIO_FINTEK 0x06 /* GPIO logical device */
+#define SIO_LD_UART2_FINTEK 0x11 /* UART2 logical device, needed to test chip model */
/*
* Nuvoton devices.
@@ -60,6 +61,7 @@ enum chips {
f71889a,
f71889f,
f81866,
+ f819xx,
f81804,
f81865,
nct6126d,
@@ -72,6 +74,7 @@ static const char * const f7188x_names[] = {
"f71889a",
"f71889f",
"f81866",
+ "f819xx",
"f81804",
"f81865",
"nct6126d",
@@ -253,6 +256,18 @@ static struct f7188x_gpio_bank f81866_gpio_bank[] = {
F7188X_GPIO_BANK(8, 0x88, DRVNAME "-8"),
};
+static struct f7188x_gpio_bank f819xx_gpio_bank[] = {
+ F7188X_GPIO_BANK(8, 0xF0, DRVNAME "-0"),
+ F7188X_GPIO_BANK(8, 0xE0, DRVNAME "-1"),
+ F7188X_GPIO_BANK(8, 0xD0, DRVNAME "-2"),
+ F7188X_GPIO_BANK(8, 0xC0, DRVNAME "-3"),
+ F7188X_GPIO_BANK(8, 0xB0, DRVNAME "-4"),
+ F7188X_GPIO_BANK(8, 0xA0, DRVNAME "-5"),
+ F7188X_GPIO_BANK(8, 0x90, DRVNAME "-6"),
+ F7188X_GPIO_BANK(8, 0x80, DRVNAME "-7"),
+ F7188X_GPIO_BANK(8, 0x88, DRVNAME "-8"),
+ F7188X_GPIO_BANK(8, 0x98, DRVNAME "-9"),
+};
static struct f7188x_gpio_bank f81804_gpio_bank[] = {
F7188X_GPIO_BANK(8, 0xF0, DRVNAME "-0"),
@@ -482,7 +497,11 @@ static int f7188x_gpio_probe(struct platform_device *pdev)
data->nr_bank = ARRAY_SIZE(f81866_gpio_bank);
data->bank = f81866_gpio_bank;
break;
- case f81804:
+ case f819xx:
+ data->nr_bank = ARRAY_SIZE(f819xx_gpio_bank);
+ data->bank = f819xx_gpio_bank;
+ break;
+ case f81804:
data->nr_bank = ARRAY_SIZE(f81804_gpio_bank);
data->bank = f81804_gpio_bank;
break;
@@ -553,8 +572,9 @@ static int __init f7188x_find(int addr, struct f7188x_sio *sio)
case SIO_F81866_ID:
sio->type = f81866;
break;
- case SIO_F81804_ID:
- sio->type = f81804;
+ case SIO_F81804_F819XX_ID:
+ superio_select(addr, SIO_LD_UART2_FINTEK);
+ sio->type = (superio_inb(addr, 0x30) == 0xFF) ? f81804 : f819xx;
break;
case SIO_F81865_ID:
sio->type = f81865;
--
2.42.0
prev parent reply other threads:[~2024-03-21 17:00 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-21 17:00 [PATCH 0/1] gpio-f7188x: add support Fintek F81804 & F81966 Guilherme Destefani
2024-03-21 17:00 ` Guilherme Destefani [this message]
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