* [PATCH v1 0/7] pinctrl: npcm8xx: pin configuration changes
@ 2024-07-11 19:37 Tomer Maimon
2024-07-11 19:37 ` [PATCH v1 1/7] pinctrl: nuvoton: npcm8xx: clear polarity before set both edge Tomer Maimon
` (7 more replies)
0 siblings, 8 replies; 14+ messages in thread
From: Tomer Maimon @ 2024-07-11 19:37 UTC (permalink / raw)
To: linus.walleij, avifishman70, tali.perry1, joel, venture, yuenn,
benjaminfair
Cc: openbmc, linux-kernel, linux-gpio, Tomer Maimon
This patch set addresses various pin configuration changes for the
Nuvoton NPCM8XX BMC SoC. The patches aim to enhance functionality,
remove unused pins, and improve overall pin management.
Tomer Maimon (7):
pinctrl: nuvoton: npcm8xx: clear polarity before set both edge
pinctrl: nuvoton: npcm8xx: add gpi35 and gpi36
pinctrl: nuvoton: npcm8xx: add pin 250 to DDR pins group
pinctrl: nuvoton: npcm8xx: remove unused smb4den pin, group, function
pinctrl: nuvoton: npcm8xx: remove unused lpcclk pin, group, function
pinctrl: nuvoton: npcm8xx: modify clkrun and serirq pin configuration
pinctrl: nuvoton: npcm8xx: modify pins flags
drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 64 +++++++++++------------
1 file changed, 31 insertions(+), 33 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH v1 1/7] pinctrl: nuvoton: npcm8xx: clear polarity before set both edge 2024-07-11 19:37 [PATCH v1 0/7] pinctrl: npcm8xx: pin configuration changes Tomer Maimon @ 2024-07-11 19:37 ` Tomer Maimon 2024-07-11 19:37 ` [PATCH v1 2/7] pinctrl: nuvoton: npcm8xx: add gpi35 and gpi36 Tomer Maimon ` (6 subsequent siblings) 7 siblings, 0 replies; 14+ messages in thread From: Tomer Maimon @ 2024-07-11 19:37 UTC (permalink / raw) To: linus.walleij, avifishman70, tali.perry1, joel, venture, yuenn, benjaminfair Cc: openbmc, linux-kernel, linux-gpio, Tomer Maimon Clear polarity before setting both edges to ensure that the polarity is in the same state before configuring events for both edges Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> --- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index a377d36b0eb0..0cd8a5e00cde 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -241,6 +241,7 @@ static int npcmgpio_set_irq_type(struct irq_data *d, unsigned int type) npcm_gpio_set(&bank->gc, bank->base + NPCM8XX_GP_N_POL, gpio); break; case IRQ_TYPE_EDGE_BOTH: + npcm_gpio_clr(&bank->gc, bank->base + NPCM8XX_GP_N_POL, gpio); npcm_gpio_set(&bank->gc, bank->base + NPCM8XX_GP_N_EVBE, gpio); break; case IRQ_TYPE_LEVEL_LOW: -- 2.34.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v1 2/7] pinctrl: nuvoton: npcm8xx: add gpi35 and gpi36 2024-07-11 19:37 [PATCH v1 0/7] pinctrl: npcm8xx: pin configuration changes Tomer Maimon 2024-07-11 19:37 ` [PATCH v1 1/7] pinctrl: nuvoton: npcm8xx: clear polarity before set both edge Tomer Maimon @ 2024-07-11 19:37 ` Tomer Maimon 2024-07-11 19:37 ` [PATCH v1 3/7] pinctrl: nuvoton: npcm8xx: add pin 250 to DDR pins group Tomer Maimon ` (5 subsequent siblings) 7 siblings, 0 replies; 14+ messages in thread From: Tomer Maimon @ 2024-07-11 19:37 UTC (permalink / raw) To: linus.walleij, avifishman70, tali.perry1, joel, venture, yuenn, benjaminfair Cc: openbmc, linux-kernel, linux-gpio, Tomer Maimon This patch adds support for GPIO pins GPI35 and GPI36 on the Nuvoton NPCM8xx BMC SoC. The pins are configured for only for input. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> --- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index 0cd8a5e00cde..cf021d0e8099 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -316,8 +316,8 @@ static struct irq_chip npcmgpio_irqchip = { GPIOCHIP_IRQ_RESOURCE_HELPERS, }; -static const int gpi36_pins[] = { 58 }; -static const int gpi35_pins[] = { 58 }; +static const int gpi36_pins[] = { 36 }; +static const int gpi35_pins[] = { 35 }; static const int tp_jtag3_pins[] = { 44, 62, 45, 46 }; static const int tp_uart_pins[] = { 50, 51 }; @@ -1366,6 +1366,8 @@ static const struct npcm8xx_pincfg pincfg[] = { NPCM8XX_PINCFG(32, spi0cs1, MFSEL1, 3, smb14b, MFSEL7, 26, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(33, i3c4, MFSEL6, 10, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(34, i3c4, MFSEL6, 10, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), + NPCM8XX_PINCFG(35, gpi35, MFSEL5, 16, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), + NPCM8XX_PINCFG(36, gpi36, MFSEL5, 18, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), NPCM8XX_PINCFG(37, smb3c, I2CSEGSEL, 12, smb23, MFSEL5, 31, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(38, smb3c, I2CSEGSEL, 12, smb23, MFSEL5, 31, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(39, smb3b, I2CSEGSEL, 11, smb22, MFSEL5, 30, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), @@ -1611,6 +1613,8 @@ static const struct pinctrl_pin_desc npcm8xx_pins[] = { PINCTRL_PIN(32, "GPIO32/SMB14B_SCL/SPI0_nCS1"), PINCTRL_PIN(33, "GPIO33/I3C4_SCL"), PINCTRL_PIN(34, "GPIO34/I3C4_SDA"), + PINCTRL_PIN(35, "MCBPCK/GPI35_AHB2PCI_DIS"), + PINCTRL_PIN(36, "SYSBPCK/GPI36"), PINCTRL_PIN(37, "GPIO37/SMB3C_SDA/SMB23_SDA"), PINCTRL_PIN(38, "GPIO38/SMB3C_SCL/SMB23_SCL"), PINCTRL_PIN(39, "GPIO39/SMB3B_SDA/SMB22_SDA"), @@ -2045,7 +2049,7 @@ static int npcm8xx_gpio_request_enable(struct pinctrl_dev *pctldev, const unsigned int *pin = &offset; int mode = fn_gpio; - if (pin[0] >= 183 && pin[0] <= 189) + if ((pin[0] >= 183 && pin[0] <= 189) || pin[0] == 35 || pin[0] == 36) mode = pincfg[pin[0]].fn0; npcm8xx_setfunc(npcm->gcr_regmap, &offset, 1, mode); -- 2.34.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v1 3/7] pinctrl: nuvoton: npcm8xx: add pin 250 to DDR pins group 2024-07-11 19:37 [PATCH v1 0/7] pinctrl: npcm8xx: pin configuration changes Tomer Maimon 2024-07-11 19:37 ` [PATCH v1 1/7] pinctrl: nuvoton: npcm8xx: clear polarity before set both edge Tomer Maimon 2024-07-11 19:37 ` [PATCH v1 2/7] pinctrl: nuvoton: npcm8xx: add gpi35 and gpi36 Tomer Maimon @ 2024-07-11 19:37 ` Tomer Maimon 2024-07-11 19:37 ` [PATCH v1 4/7] pinctrl: nuvoton: npcm8xx: remove unused smb4den pin, group, function Tomer Maimon ` (4 subsequent siblings) 7 siblings, 0 replies; 14+ messages in thread From: Tomer Maimon @ 2024-07-11 19:37 UTC (permalink / raw) To: linus.walleij, avifishman70, tali.perry1, joel, venture, yuenn, benjaminfair Cc: openbmc, linux-kernel, linux-gpio, Tomer Maimon Add pin 250 to DDR pins group on the Nuvoton NPCM8xx BMC SoC. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> --- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index cf021d0e8099..f342aec3f6ca 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -516,7 +516,7 @@ static const int rg2_pins[] = { 110, 111, 112, 113, 208, 209, 210, 211, 212, static const int rg2mdio_pins[] = { 216, 217 }; static const int ddr_pins[] = { 110, 111, 112, 113, 208, 209, 210, 211, 212, - 213, 214, 215, 216, 217 }; + 213, 214, 215, 216, 217, 250 }; static const int iox1_pins[] = { 0, 1, 2, 3 }; static const int iox2_pins[] = { 4, 5, 6, 7 }; @@ -1570,6 +1570,7 @@ static const struct npcm8xx_pincfg pincfg[] = { NPCM8XX_PINCFG(245, i3c2, MFSEL5, 21, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(246, i3c3, MFSEL5, 23, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(247, i3c3, MFSEL5, 23, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), + NPCM8XX_PINCFG(250, ddr, MFSEL3, 26, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), NPCM8XX_PINCFG(251, jm2, MFSEL5, 1, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(253, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPI), /* SDHC1 power */ NPCM8XX_PINCFG(254, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPI), /* SDHC2 power */ -- 2.34.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v1 4/7] pinctrl: nuvoton: npcm8xx: remove unused smb4den pin, group, function 2024-07-11 19:37 [PATCH v1 0/7] pinctrl: npcm8xx: pin configuration changes Tomer Maimon ` (2 preceding siblings ...) 2024-07-11 19:37 ` [PATCH v1 3/7] pinctrl: nuvoton: npcm8xx: add pin 250 to DDR pins group Tomer Maimon @ 2024-07-11 19:37 ` Tomer Maimon 2024-07-12 17:45 ` J. Neuschäfer 2024-07-11 19:37 ` [PATCH v1 5/7] pinctrl: nuvoton: npcm8xx: remove unused lpcclk " Tomer Maimon ` (3 subsequent siblings) 7 siblings, 1 reply; 14+ messages in thread From: Tomer Maimon @ 2024-07-11 19:37 UTC (permalink / raw) To: linus.walleij, avifishman70, tali.perry1, joel, venture, yuenn, benjaminfair Cc: openbmc, linux-kernel, linux-gpio, Tomer Maimon Remove unused smb4den pin, group and function on the Nuvoton NPCM8XX BMC SoC. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> --- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index f342aec3f6ca..396bd07e7c74 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -438,7 +438,6 @@ static const int smb4_pins[] = { 28, 29 }; static const int smb4b_pins[] = { 18, 19 }; static const int smb4c_pins[] = { 20, 21 }; static const int smb4d_pins[] = { 22, 23 }; -static const int smb4den_pins[] = { 17 }; static const int smb5_pins[] = { 26, 27 }; static const int smb5b_pins[] = { 13, 12 }; static const int smb5c_pins[] = { 15, 14 }; @@ -700,7 +699,6 @@ struct npcm8xx_pingroup { NPCM8XX_GRP(smb4b), \ NPCM8XX_GRP(smb4c), \ NPCM8XX_GRP(smb4d), \ - NPCM8XX_GRP(smb4den), \ NPCM8XX_GRP(smb5), \ NPCM8XX_GRP(smb5b), \ NPCM8XX_GRP(smb5c), \ @@ -949,7 +947,6 @@ NPCM8XX_SFUNC(smb4); NPCM8XX_SFUNC(smb4b); NPCM8XX_SFUNC(smb4c); NPCM8XX_SFUNC(smb4d); -NPCM8XX_SFUNC(smb4den); NPCM8XX_SFUNC(smb5); NPCM8XX_SFUNC(smb5b); NPCM8XX_SFUNC(smb5c); @@ -1173,7 +1170,6 @@ static struct npcm8xx_func npcm8xx_funcs[] = { NPCM8XX_MKFUNC(smb4b), NPCM8XX_MKFUNC(smb4c), NPCM8XX_MKFUNC(smb4d), - NPCM8XX_MKFUNC(smb4den), NPCM8XX_MKFUNC(smb5), NPCM8XX_MKFUNC(smb5b), NPCM8XX_MKFUNC(smb5c), @@ -1348,7 +1344,7 @@ static const struct npcm8xx_pincfg pincfg[] = { NPCM8XX_PINCFG(14, gspi, MFSEL1, 24, smb5c, I2CSEGSEL, 20, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(15, gspi, MFSEL1, 24, smb5c, I2CSEGSEL, 20, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(16, lkgpo0, FLOCKR1, 0, smb7b, I2CSEGSEL, 27, tp_gpio2b, MFSEL7, 10, none, NONE, 0, none, NONE, 0, SLEW), - NPCM8XX_PINCFG(17, pspi, MFSEL3, 13, cp1gpio5, MFSEL6, 7, smb4den, I2CSEGSEL, 23, none, NONE, 0, none, NONE, 0, SLEW), + NPCM8XX_PINCFG(17, pspi, MFSEL3, 13, cp1gpio5, MFSEL6, 7, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(18, pspi, MFSEL3, 13, smb4b, I2CSEGSEL, 14, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(19, pspi, MFSEL3, 13, smb4b, I2CSEGSEL, 14, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(20, hgpio0, MFSEL2, 24, smb15, MFSEL3, 8, smb4c, I2CSEGSEL, 15, none, NONE, 0, none, NONE, 0, SLEW), -- 2.34.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v1 4/7] pinctrl: nuvoton: npcm8xx: remove unused smb4den pin, group, function 2024-07-11 19:37 ` [PATCH v1 4/7] pinctrl: nuvoton: npcm8xx: remove unused smb4den pin, group, function Tomer Maimon @ 2024-07-12 17:45 ` J. Neuschäfer 2024-07-16 14:24 ` Tomer Maimon 0 siblings, 1 reply; 14+ messages in thread From: J. Neuschäfer @ 2024-07-12 17:45 UTC (permalink / raw) To: Tomer Maimon Cc: linus.walleij, avifishman70, tali.perry1, joel, venture, yuenn, benjaminfair, linux-gpio, openbmc, linux-kernel On Thu, Jul 11, 2024 at 10:37:46PM +0300, Tomer Maimon wrote: > Remove unused smb4den pin, group and function on the Nuvoton NPCM8XX BMC > SoC. Does "unused" mean that they are just unused in current board designs, or does the hardware functionality actually not exist? Best regards, J > > Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> > --- > drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 6 +----- > 1 file changed, 1 insertion(+), 5 deletions(-) > > diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c > index f342aec3f6ca..396bd07e7c74 100644 > --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c > +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c > @@ -438,7 +438,6 @@ static const int smb4_pins[] = { 28, 29 }; > static const int smb4b_pins[] = { 18, 19 }; > static const int smb4c_pins[] = { 20, 21 }; > static const int smb4d_pins[] = { 22, 23 }; > -static const int smb4den_pins[] = { 17 }; > static const int smb5_pins[] = { 26, 27 }; > static const int smb5b_pins[] = { 13, 12 }; > static const int smb5c_pins[] = { 15, 14 }; > @@ -700,7 +699,6 @@ struct npcm8xx_pingroup { > NPCM8XX_GRP(smb4b), \ > NPCM8XX_GRP(smb4c), \ > NPCM8XX_GRP(smb4d), \ > - NPCM8XX_GRP(smb4den), \ > NPCM8XX_GRP(smb5), \ > NPCM8XX_GRP(smb5b), \ > NPCM8XX_GRP(smb5c), \ > @@ -949,7 +947,6 @@ NPCM8XX_SFUNC(smb4); > NPCM8XX_SFUNC(smb4b); > NPCM8XX_SFUNC(smb4c); > NPCM8XX_SFUNC(smb4d); > -NPCM8XX_SFUNC(smb4den); > NPCM8XX_SFUNC(smb5); > NPCM8XX_SFUNC(smb5b); > NPCM8XX_SFUNC(smb5c); > @@ -1173,7 +1170,6 @@ static struct npcm8xx_func npcm8xx_funcs[] = { > NPCM8XX_MKFUNC(smb4b), > NPCM8XX_MKFUNC(smb4c), > NPCM8XX_MKFUNC(smb4d), > - NPCM8XX_MKFUNC(smb4den), > NPCM8XX_MKFUNC(smb5), > NPCM8XX_MKFUNC(smb5b), > NPCM8XX_MKFUNC(smb5c), > @@ -1348,7 +1344,7 @@ static const struct npcm8xx_pincfg pincfg[] = { > NPCM8XX_PINCFG(14, gspi, MFSEL1, 24, smb5c, I2CSEGSEL, 20, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), > NPCM8XX_PINCFG(15, gspi, MFSEL1, 24, smb5c, I2CSEGSEL, 20, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), > NPCM8XX_PINCFG(16, lkgpo0, FLOCKR1, 0, smb7b, I2CSEGSEL, 27, tp_gpio2b, MFSEL7, 10, none, NONE, 0, none, NONE, 0, SLEW), > - NPCM8XX_PINCFG(17, pspi, MFSEL3, 13, cp1gpio5, MFSEL6, 7, smb4den, I2CSEGSEL, 23, none, NONE, 0, none, NONE, 0, SLEW), > + NPCM8XX_PINCFG(17, pspi, MFSEL3, 13, cp1gpio5, MFSEL6, 7, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), > NPCM8XX_PINCFG(18, pspi, MFSEL3, 13, smb4b, I2CSEGSEL, 14, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), > NPCM8XX_PINCFG(19, pspi, MFSEL3, 13, smb4b, I2CSEGSEL, 14, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), > NPCM8XX_PINCFG(20, hgpio0, MFSEL2, 24, smb15, MFSEL3, 8, smb4c, I2CSEGSEL, 15, none, NONE, 0, none, NONE, 0, SLEW), > -- > 2.34.1 > ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v1 4/7] pinctrl: nuvoton: npcm8xx: remove unused smb4den pin, group, function 2024-07-12 17:45 ` J. Neuschäfer @ 2024-07-16 14:24 ` Tomer Maimon 2024-07-18 20:58 ` J. Neuschäfer 0 siblings, 1 reply; 14+ messages in thread From: Tomer Maimon @ 2024-07-16 14:24 UTC (permalink / raw) To: J. Neuschäfer Cc: linus.walleij, avifishman70, tali.perry1, joel, venture, yuenn, benjaminfair, linux-gpio, openbmc, linux-kernel Hi, It does not exist, do you suggest modifying the "unused" to "not exist"? Thanks, Tomer On Fri, 12 Jul 2024 at 20:45, J. Neuschäfer <j.neuschaefer@gmx.net> wrote: > > On Thu, Jul 11, 2024 at 10:37:46PM +0300, Tomer Maimon wrote: > > Remove unused smb4den pin, group and function on the Nuvoton NPCM8XX BMC > > SoC. > > Does "unused" mean that they are just unused in current board designs, > or does the hardware functionality actually not exist? > > Best regards, J > > > > > Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> > > --- > > drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 6 +----- > > 1 file changed, 1 insertion(+), 5 deletions(-) > > > > diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c > > index f342aec3f6ca..396bd07e7c74 100644 > > --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c > > +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c > > @@ -438,7 +438,6 @@ static const int smb4_pins[] = { 28, 29 }; > > static const int smb4b_pins[] = { 18, 19 }; > > static const int smb4c_pins[] = { 20, 21 }; > > static const int smb4d_pins[] = { 22, 23 }; > > -static const int smb4den_pins[] = { 17 }; > > static const int smb5_pins[] = { 26, 27 }; > > static const int smb5b_pins[] = { 13, 12 }; > > static const int smb5c_pins[] = { 15, 14 }; > > @@ -700,7 +699,6 @@ struct npcm8xx_pingroup { > > NPCM8XX_GRP(smb4b), \ > > NPCM8XX_GRP(smb4c), \ > > NPCM8XX_GRP(smb4d), \ > > - NPCM8XX_GRP(smb4den), \ > > NPCM8XX_GRP(smb5), \ > > NPCM8XX_GRP(smb5b), \ > > NPCM8XX_GRP(smb5c), \ > > @@ -949,7 +947,6 @@ NPCM8XX_SFUNC(smb4); > > NPCM8XX_SFUNC(smb4b); > > NPCM8XX_SFUNC(smb4c); > > NPCM8XX_SFUNC(smb4d); > > -NPCM8XX_SFUNC(smb4den); > > NPCM8XX_SFUNC(smb5); > > NPCM8XX_SFUNC(smb5b); > > NPCM8XX_SFUNC(smb5c); > > @@ -1173,7 +1170,6 @@ static struct npcm8xx_func npcm8xx_funcs[] = { > > NPCM8XX_MKFUNC(smb4b), > > NPCM8XX_MKFUNC(smb4c), > > NPCM8XX_MKFUNC(smb4d), > > - NPCM8XX_MKFUNC(smb4den), > > NPCM8XX_MKFUNC(smb5), > > NPCM8XX_MKFUNC(smb5b), > > NPCM8XX_MKFUNC(smb5c), > > @@ -1348,7 +1344,7 @@ static const struct npcm8xx_pincfg pincfg[] = { > > NPCM8XX_PINCFG(14, gspi, MFSEL1, 24, smb5c, I2CSEGSEL, 20, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), > > NPCM8XX_PINCFG(15, gspi, MFSEL1, 24, smb5c, I2CSEGSEL, 20, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), > > NPCM8XX_PINCFG(16, lkgpo0, FLOCKR1, 0, smb7b, I2CSEGSEL, 27, tp_gpio2b, MFSEL7, 10, none, NONE, 0, none, NONE, 0, SLEW), > > - NPCM8XX_PINCFG(17, pspi, MFSEL3, 13, cp1gpio5, MFSEL6, 7, smb4den, I2CSEGSEL, 23, none, NONE, 0, none, NONE, 0, SLEW), > > + NPCM8XX_PINCFG(17, pspi, MFSEL3, 13, cp1gpio5, MFSEL6, 7, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), > > NPCM8XX_PINCFG(18, pspi, MFSEL3, 13, smb4b, I2CSEGSEL, 14, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), > > NPCM8XX_PINCFG(19, pspi, MFSEL3, 13, smb4b, I2CSEGSEL, 14, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), > > NPCM8XX_PINCFG(20, hgpio0, MFSEL2, 24, smb15, MFSEL3, 8, smb4c, I2CSEGSEL, 15, none, NONE, 0, none, NONE, 0, SLEW), > > -- > > 2.34.1 > > ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v1 4/7] pinctrl: nuvoton: npcm8xx: remove unused smb4den pin, group, function 2024-07-16 14:24 ` Tomer Maimon @ 2024-07-18 20:58 ` J. Neuschäfer 2024-07-18 22:05 ` Tomer Maimon 0 siblings, 1 reply; 14+ messages in thread From: J. Neuschäfer @ 2024-07-18 20:58 UTC (permalink / raw) To: Tomer Maimon Cc: J. Neuschäfer, linus.walleij, avifishman70, tali.perry1, joel, venture, yuenn, benjaminfair, linux-gpio, openbmc, linux-kernel On Tue, Jul 16, 2024 at 05:24:11PM +0300, Tomer Maimon wrote: > Hi, > > It does not exist, do you suggest modifying the "unused" to "not exist"? Yes, that would be clearer in my opinion. Best regards, Jonathan ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v1 4/7] pinctrl: nuvoton: npcm8xx: remove unused smb4den pin, group, function 2024-07-18 20:58 ` J. Neuschäfer @ 2024-07-18 22:05 ` Tomer Maimon 0 siblings, 0 replies; 14+ messages in thread From: Tomer Maimon @ 2024-07-18 22:05 UTC (permalink / raw) To: J. Neuschäfer Cc: linus.walleij, avifishman70, tali.perry1, joel, venture, yuenn, benjaminfair, linux-gpio, openbmc, linux-kernel Done in V2 :-) On Thu, 18 Jul 2024 at 23:58, J. Neuschäfer <j.neuschaefer@gmx.net> wrote: > > On Tue, Jul 16, 2024 at 05:24:11PM +0300, Tomer Maimon wrote: > > Hi, > > > > It does not exist, do you suggest modifying the "unused" to "not exist"? > > Yes, that would be clearer in my opinion. > > Best regards, > Jonathan ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v1 5/7] pinctrl: nuvoton: npcm8xx: remove unused lpcclk pin, group, function 2024-07-11 19:37 [PATCH v1 0/7] pinctrl: npcm8xx: pin configuration changes Tomer Maimon ` (3 preceding siblings ...) 2024-07-11 19:37 ` [PATCH v1 4/7] pinctrl: nuvoton: npcm8xx: remove unused smb4den pin, group, function Tomer Maimon @ 2024-07-11 19:37 ` Tomer Maimon 2024-07-11 19:37 ` [PATCH v1 6/7] pinctrl: nuvoton: npcm8xx: modify clkrun and serirq pin configuration Tomer Maimon ` (2 subsequent siblings) 7 siblings, 0 replies; 14+ messages in thread From: Tomer Maimon @ 2024-07-11 19:37 UTC (permalink / raw) To: linus.walleij, avifishman70, tali.perry1, joel, venture, yuenn, benjaminfair Cc: openbmc, linux-kernel, linux-gpio, Tomer Maimon Remove unused lpcclk pin, group and function on the Nuvoton NPCM8XX BMC SoC. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> --- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index 396bd07e7c74..bc947d0d6ede 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -570,7 +570,6 @@ static const int spi3cs3_pins[] = { 189 }; static const int ddc_pins[] = { 204, 205, 206, 207 }; static const int lpc_pins[] = { 95, 161, 163, 164, 165, 166, 167 }; -static const int lpcclk_pins[] = { 168 }; static const int espi_pins[] = { 95, 161, 163, 164, 165, 166, 167, 168 }; static const int lkgpo0_pins[] = { 16 }; @@ -807,7 +806,6 @@ struct npcm8xx_pingroup { NPCM8XX_GRP(spi3cs3), \ NPCM8XX_GRP(spi0cs1), \ NPCM8XX_GRP(lpc), \ - NPCM8XX_GRP(lpcclk), \ NPCM8XX_GRP(espi), \ NPCM8XX_GRP(lkgpo0), \ NPCM8XX_GRP(lkgpo1), \ @@ -1054,7 +1052,6 @@ NPCM8XX_SFUNC(spi3cs2); NPCM8XX_SFUNC(spi3cs3); NPCM8XX_SFUNC(spi0cs1); NPCM8XX_SFUNC(lpc); -NPCM8XX_SFUNC(lpcclk); NPCM8XX_SFUNC(espi); NPCM8XX_SFUNC(lkgpo0); NPCM8XX_SFUNC(lkgpo1); @@ -1277,7 +1274,6 @@ static struct npcm8xx_func npcm8xx_funcs[] = { NPCM8XX_MKFUNC(spi3cs3), NPCM8XX_MKFUNC(spi0cs1), NPCM8XX_MKFUNC(lpc), - NPCM8XX_MKFUNC(lpcclk), NPCM8XX_MKFUNC(espi), NPCM8XX_MKFUNC(lkgpo0), NPCM8XX_MKFUNC(lkgpo1), @@ -1495,7 +1491,7 @@ static const struct npcm8xx_pincfg pincfg[] = { NPCM8XX_PINCFG(165, lpc, MFSEL1, 26, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), NPCM8XX_PINCFG(166, lpc, MFSEL1, 26, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), NPCM8XX_PINCFG(167, lpc, MFSEL1, 26, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), - NPCM8XX_PINCFG(168, lpcclk, MFSEL1, 31, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), + NPCM8XX_PINCFG(168, none, NONE, 0, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), NPCM8XX_PINCFG(169, scipme, MFSEL3, 0, smb21, MFSEL5, 29, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), NPCM8XX_PINCFG(170, smi, MFSEL1, 22, smb21, MFSEL5, 29, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), NPCM8XX_PINCFG(171, smb6, MFSEL3, 1, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), -- 2.34.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v1 6/7] pinctrl: nuvoton: npcm8xx: modify clkrun and serirq pin configuration 2024-07-11 19:37 [PATCH v1 0/7] pinctrl: npcm8xx: pin configuration changes Tomer Maimon ` (4 preceding siblings ...) 2024-07-11 19:37 ` [PATCH v1 5/7] pinctrl: nuvoton: npcm8xx: remove unused lpcclk " Tomer Maimon @ 2024-07-11 19:37 ` Tomer Maimon 2024-07-11 19:37 ` [PATCH v1 7/7] pinctrl: nuvoton: npcm8xx: modify pins flags Tomer Maimon 2024-07-13 12:35 ` [PATCH v1 0/7] pinctrl: npcm8xx: pin configuration changes Jonas Gorski 7 siblings, 0 replies; 14+ messages in thread From: Tomer Maimon @ 2024-07-11 19:37 UTC (permalink / raw) To: linus.walleij, avifishman70, tali.perry1, joel, venture, yuenn, benjaminfair Cc: openbmc, linux-kernel, linux-gpio, Tomer Maimon Modify clkrun and serirq pin configuration on the Nuvoton NPCM8XX BMC SoC. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> --- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index bc947d0d6ede..2cc433a74ad2 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -1485,13 +1485,13 @@ static const struct npcm8xx_pincfg pincfg[] = { NPCM8XX_PINCFG(159, mmc, MFSEL3, 10, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), NPCM8XX_PINCFG(160, clkout, MFSEL1, 21, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), NPCM8XX_PINCFG(161, lpc, MFSEL1, 26, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), - NPCM8XX_PINCFG(162, serirq, MFSEL1, 31, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(8, 12)), + NPCM8XX_PINCFG(162, clkrun, MFSEL3, 16, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(8, 12)), NPCM8XX_PINCFG(163, lpc, MFSEL1, 26, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), NPCM8XX_PINCFG(164, lpc, MFSEL1, 26, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), NPCM8XX_PINCFG(165, lpc, MFSEL1, 26, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), NPCM8XX_PINCFG(166, lpc, MFSEL1, 26, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), NPCM8XX_PINCFG(167, lpc, MFSEL1, 26, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), - NPCM8XX_PINCFG(168, none, NONE, 0, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), + NPCM8XX_PINCFG(168, serirq, MFSEL1, 31, espi, MFSEL4, 8, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), NPCM8XX_PINCFG(169, scipme, MFSEL3, 0, smb21, MFSEL5, 29, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), NPCM8XX_PINCFG(170, smi, MFSEL1, 22, smb21, MFSEL5, 29, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), NPCM8XX_PINCFG(171, smb6, MFSEL3, 1, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), -- 2.34.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v1 7/7] pinctrl: nuvoton: npcm8xx: modify pins flags 2024-07-11 19:37 [PATCH v1 0/7] pinctrl: npcm8xx: pin configuration changes Tomer Maimon ` (5 preceding siblings ...) 2024-07-11 19:37 ` [PATCH v1 6/7] pinctrl: nuvoton: npcm8xx: modify clkrun and serirq pin configuration Tomer Maimon @ 2024-07-11 19:37 ` Tomer Maimon 2024-07-13 12:35 ` [PATCH v1 0/7] pinctrl: npcm8xx: pin configuration changes Jonas Gorski 7 siblings, 0 replies; 14+ messages in thread From: Tomer Maimon @ 2024-07-11 19:37 UTC (permalink / raw) To: linus.walleij, avifishman70, tali.perry1, joel, venture, yuenn, benjaminfair Cc: openbmc, linux-kernel, linux-gpio, Tomer Maimon Modify the following pins flags on the Nuvoton NPCM8XX BMC: - Add pins 110-113, 187, 191, 192, 194-199, 202 SLEW flag - Add pins 229 and 230 GPO flag. - Remove pin 233 SLEWLPC flag. - Remove pin 251 SLEW flag. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> --- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 36 +++++++++++------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index 2cc433a74ad2..471f644c5eef 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -1433,10 +1433,10 @@ static const struct npcm8xx_pincfg pincfg[] = { NPCM8XX_PINCFG(107, i3c5, MFSEL3, 22, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(108, sg1mdio, MFSEL4, 21, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(109, sg1mdio, MFSEL4, 21, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), - NPCM8XX_PINCFG(110, rg2, MFSEL4, 24, ddr, MFSEL3, 26, rmii3, MFSEL5, 11, none, NONE, 0, none, NONE, 0, 0), - NPCM8XX_PINCFG(111, rg2, MFSEL4, 24, ddr, MFSEL3, 26, rmii3, MFSEL5, 11, none, NONE, 0, none, NONE, 0, 0), - NPCM8XX_PINCFG(112, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), - NPCM8XX_PINCFG(113, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), + NPCM8XX_PINCFG(110, rg2, MFSEL4, 24, ddr, MFSEL3, 26, rmii3, MFSEL5, 11, none, NONE, 0, none, NONE, 0, SLEW), + NPCM8XX_PINCFG(111, rg2, MFSEL4, 24, ddr, MFSEL3, 26, rmii3, MFSEL5, 11, none, NONE, 0, none, NONE, 0, SLEW), + NPCM8XX_PINCFG(112, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), + NPCM8XX_PINCFG(113, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(114, smb0, MFSEL1, 6, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), NPCM8XX_PINCFG(115, smb0, MFSEL1, 6, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), NPCM8XX_PINCFG(116, smb1, MFSEL1, 7, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), @@ -1510,22 +1510,22 @@ static const struct npcm8xx_pincfg pincfg[] = { NPCM8XX_PINCFG(184, gpio1836, MFSEL6, 19, spi3, MFSEL4, 16, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), NPCM8XX_PINCFG(185, gpio1836, MFSEL6, 19, spi3, MFSEL4, 16, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), NPCM8XX_PINCFG(186, gpio1836, MFSEL6, 19, spi3, MFSEL4, 16, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(8, 12)), - NPCM8XX_PINCFG(187, gpo187, MFSEL7, 24, smb14b, MFSEL7, 26, spi3cs1, MFSEL4, 17, none, NONE, 0, none, NONE, 0, 0), + NPCM8XX_PINCFG(187, gpo187, MFSEL7, 24, smb14b, MFSEL7, 26, spi3cs1, MFSEL4, 17, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(188, gpio1889, MFSEL7, 25, spi3cs2, MFSEL4, 18, spi3quad, MFSEL4, 20, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), NPCM8XX_PINCFG(189, gpio1889, MFSEL7, 25, spi3cs3, MFSEL4, 19, spi3quad, MFSEL4, 20, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), NPCM8XX_PINCFG(190, nprd_smi, FLOCKR1, 20, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(2, 4)), - NPCM8XX_PINCFG(191, spi1d23, MFSEL5, 3, spi1cs2, MFSEL5, 4, fm1, MFSEL6, 17, smb15, MFSEL7, 27, none, NONE, 0, DSTR(0, 2)), /* XX */ - NPCM8XX_PINCFG(192, spi1d23, MFSEL5, 3, spi1cs3, MFSEL5, 5, fm1, MFSEL6, 17, smb15, MFSEL7, 27, none, NONE, 0, DSTR(0, 2)), /* XX */ + NPCM8XX_PINCFG(191, spi1d23, MFSEL5, 3, spi1cs2, MFSEL5, 4, fm1, MFSEL6, 17, smb15, MFSEL7, 27, none, NONE, 0, SLEW), /* XX */ + NPCM8XX_PINCFG(192, spi1d23, MFSEL5, 3, spi1cs3, MFSEL5, 5, fm1, MFSEL6, 17, smb15, MFSEL7, 27, none, NONE, 0, SLEW), /* XX */ NPCM8XX_PINCFG(193, r1, MFSEL3, 9, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), - NPCM8XX_PINCFG(194, smb0b, I2CSEGSEL, 0, fm0, MFSEL6, 16, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(0, 1)), - NPCM8XX_PINCFG(195, smb0b, I2CSEGSEL, 0, fm0, MFSEL6, 16, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(0, 1)), - NPCM8XX_PINCFG(196, smb0c, I2CSEGSEL, 1, fm0, MFSEL6, 16, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(0, 1)), - NPCM8XX_PINCFG(197, smb0den, I2CSEGSEL, 22, fm0, MFSEL6, 16, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(0, 1)), - NPCM8XX_PINCFG(198, smb0d, I2CSEGSEL, 2, fm0, MFSEL6, 16, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(0, 1)), - NPCM8XX_PINCFG(199, smb0d, I2CSEGSEL, 2, fm0, MFSEL6, 16, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(0, 1)), + NPCM8XX_PINCFG(194, smb0b, I2CSEGSEL, 0, fm0, MFSEL6, 16, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), + NPCM8XX_PINCFG(195, smb0b, I2CSEGSEL, 0, fm0, MFSEL6, 16, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), + NPCM8XX_PINCFG(196, smb0c, I2CSEGSEL, 1, fm0, MFSEL6, 16, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), + NPCM8XX_PINCFG(197, smb0den, I2CSEGSEL, 22, fm0, MFSEL6, 16, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), + NPCM8XX_PINCFG(198, smb0d, I2CSEGSEL, 2, fm0, MFSEL6, 16, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), + NPCM8XX_PINCFG(199, smb0d, I2CSEGSEL, 2, fm0, MFSEL6, 16, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(200, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPO), NPCM8XX_PINCFG(201, r1, MFSEL3, 9, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPO), - NPCM8XX_PINCFG(202, smb0c, I2CSEGSEL, 1, fm0, MFSEL6, 16, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(0, 1)), + NPCM8XX_PINCFG(202, smb0c, I2CSEGSEL, 1, fm0, MFSEL6, 16, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(203, faninx, MFSEL3, 3, spi1cs0, MFSEL3, 4, fm1, MFSEL6, 17, none, NONE, 0, none, NONE, 0, DSTR(8, 12)), NPCM8XX_PINCFG(208, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), /* DSCNT */ NPCM8XX_PINCFG(209, rg2, MFSEL4, 24, ddr, MFSEL3, 26, rmii3, MFSEL5, 11, none, NONE, 0, none, NONE, 0, SLEW), /* DSCNT */ @@ -1548,10 +1548,10 @@ static const struct npcm8xx_pincfg pincfg[] = { NPCM8XX_PINCFG(226, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPO | DSTR(8, 12) | SLEW), NPCM8XX_PINCFG(227, spix, MFSEL4, 27, fm2, MFSEL6, 18, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), NPCM8XX_PINCFG(228, spixcs1, MFSEL4, 28, fm2, MFSEL6, 18, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), - NPCM8XX_PINCFG(229, spix, MFSEL4, 27, fm2, MFSEL6, 18, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), - NPCM8XX_PINCFG(230, spix, MFSEL4, 27, fm2, MFSEL6, 18, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), + NPCM8XX_PINCFG(229, spix, MFSEL4, 27, fm2, MFSEL6, 18, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPO | DSTR(8, 12) | SLEW), + NPCM8XX_PINCFG(230, spix, MFSEL4, 27, fm2, MFSEL6, 18, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPO | DSTR(8, 12) | SLEW), NPCM8XX_PINCFG(231, clkreq, MFSEL4, 9, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(4, 12) | SLEW), - NPCM8XX_PINCFG(233, spi1cs1, MFSEL5, 0, fm1, MFSEL6, 17, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEWLPC), /* slewlpc ? */ + NPCM8XX_PINCFG(233, spi1cs1, MFSEL5, 0, fm1, MFSEL6, 17, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), /* slewlpc ? */ NPCM8XX_PINCFG(234, pwm10, MFSEL6, 13, smb20, MFSEL5, 28, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), NPCM8XX_PINCFG(235, pwm11, MFSEL6, 14, smb20, MFSEL5, 28, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(240, i3c0, MFSEL5, 17, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), @@ -1563,7 +1563,7 @@ static const struct npcm8xx_pincfg pincfg[] = { NPCM8XX_PINCFG(246, i3c3, MFSEL5, 23, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(247, i3c3, MFSEL5, 23, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), NPCM8XX_PINCFG(250, ddr, MFSEL3, 26, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, DSTR(8, 12) | SLEW), - NPCM8XX_PINCFG(251, jm2, MFSEL5, 1, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), + NPCM8XX_PINCFG(251, jm2, MFSEL5, 1, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, 0), NPCM8XX_PINCFG(253, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPI), /* SDHC1 power */ NPCM8XX_PINCFG(254, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPI), /* SDHC2 power */ NPCM8XX_PINCFG(255, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPI), /* DACOSEL */ -- 2.34.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v1 0/7] pinctrl: npcm8xx: pin configuration changes 2024-07-11 19:37 [PATCH v1 0/7] pinctrl: npcm8xx: pin configuration changes Tomer Maimon ` (6 preceding siblings ...) 2024-07-11 19:37 ` [PATCH v1 7/7] pinctrl: nuvoton: npcm8xx: modify pins flags Tomer Maimon @ 2024-07-13 12:35 ` Jonas Gorski 2024-07-16 14:24 ` Tomer Maimon 7 siblings, 1 reply; 14+ messages in thread From: Jonas Gorski @ 2024-07-13 12:35 UTC (permalink / raw) To: Tomer Maimon Cc: linus.walleij, avifishman70, tali.perry1, joel, venture, yuenn, benjaminfair, openbmc, linux-kernel, linux-gpio Hi, On Fri, 12 Jul 2024 at 02:48, Tomer Maimon <tmaimon77@gmail.com> wrote: > > This patch set addresses various pin configuration changes for the > Nuvoton NPCM8XX BMC SoC. The patches aim to enhance functionality, > remove unused pins, and improve overall pin management. > > Tomer Maimon (7): > pinctrl: nuvoton: npcm8xx: clear polarity before set both edge > pinctrl: nuvoton: npcm8xx: add gpi35 and gpi36 > pinctrl: nuvoton: npcm8xx: add pin 250 to DDR pins group > pinctrl: nuvoton: npcm8xx: remove unused smb4den pin, group, function > pinctrl: nuvoton: npcm8xx: remove unused lpcclk pin, group, function > pinctrl: nuvoton: npcm8xx: modify clkrun and serirq pin configuration > pinctrl: nuvoton: npcm8xx: modify pins flags You also need to update Documentation/devicetree/bindings/pinctrl/nuvoton,npcm845-pinctrl.yaml for any changes that affect the device tree bindings (e.g. adding/removing functions/groups). Best Regards, Jonas ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v1 0/7] pinctrl: npcm8xx: pin configuration changes 2024-07-13 12:35 ` [PATCH v1 0/7] pinctrl: npcm8xx: pin configuration changes Jonas Gorski @ 2024-07-16 14:24 ` Tomer Maimon 0 siblings, 0 replies; 14+ messages in thread From: Tomer Maimon @ 2024-07-16 14:24 UTC (permalink / raw) To: Jonas Gorski Cc: linus.walleij, avifishman70, tali.perry1, joel, venture, yuenn, benjaminfair, openbmc, linux-kernel, linux-gpio Hi Jonas, Thanks for your comment, will be addressed in next version. Thanks, Tomer On Sat, 13 Jul 2024 at 15:35, Jonas Gorski <jonas.gorski@gmail.com> wrote: > > Hi, > > On Fri, 12 Jul 2024 at 02:48, Tomer Maimon <tmaimon77@gmail.com> wrote: > > > > This patch set addresses various pin configuration changes for the > > Nuvoton NPCM8XX BMC SoC. The patches aim to enhance functionality, > > remove unused pins, and improve overall pin management. > > > > Tomer Maimon (7): > > pinctrl: nuvoton: npcm8xx: clear polarity before set both edge > > pinctrl: nuvoton: npcm8xx: add gpi35 and gpi36 > > pinctrl: nuvoton: npcm8xx: add pin 250 to DDR pins group > > pinctrl: nuvoton: npcm8xx: remove unused smb4den pin, group, function > > pinctrl: nuvoton: npcm8xx: remove unused lpcclk pin, group, function > > pinctrl: nuvoton: npcm8xx: modify clkrun and serirq pin configuration > > pinctrl: nuvoton: npcm8xx: modify pins flags > > You also need to update > Documentation/devicetree/bindings/pinctrl/nuvoton,npcm845-pinctrl.yaml > for any changes that affect the device tree bindings (e.g. > adding/removing functions/groups). > > Best Regards, > Jonas ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2024-07-18 22:06 UTC | newest] Thread overview: 14+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-07-11 19:37 [PATCH v1 0/7] pinctrl: npcm8xx: pin configuration changes Tomer Maimon 2024-07-11 19:37 ` [PATCH v1 1/7] pinctrl: nuvoton: npcm8xx: clear polarity before set both edge Tomer Maimon 2024-07-11 19:37 ` [PATCH v1 2/7] pinctrl: nuvoton: npcm8xx: add gpi35 and gpi36 Tomer Maimon 2024-07-11 19:37 ` [PATCH v1 3/7] pinctrl: nuvoton: npcm8xx: add pin 250 to DDR pins group Tomer Maimon 2024-07-11 19:37 ` [PATCH v1 4/7] pinctrl: nuvoton: npcm8xx: remove unused smb4den pin, group, function Tomer Maimon 2024-07-12 17:45 ` J. Neuschäfer 2024-07-16 14:24 ` Tomer Maimon 2024-07-18 20:58 ` J. Neuschäfer 2024-07-18 22:05 ` Tomer Maimon 2024-07-11 19:37 ` [PATCH v1 5/7] pinctrl: nuvoton: npcm8xx: remove unused lpcclk " Tomer Maimon 2024-07-11 19:37 ` [PATCH v1 6/7] pinctrl: nuvoton: npcm8xx: modify clkrun and serirq pin configuration Tomer Maimon 2024-07-11 19:37 ` [PATCH v1 7/7] pinctrl: nuvoton: npcm8xx: modify pins flags Tomer Maimon 2024-07-13 12:35 ` [PATCH v1 0/7] pinctrl: npcm8xx: pin configuration changes Jonas Gorski 2024-07-16 14:24 ` Tomer Maimon
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