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From: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com>
To: Linus Walleij <linus.walleij@linaro.org>,
	Dong Aisheng <aisheng.dong@nxp.com>,
	Fabio Estevam <festevam@gmail.com>,
	Shawn Guo <shawnguo@kernel.org>, Jacky Bai <ping.bai@nxp.com>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Chester Lin <chester62515@gmail.com>,
	Matthias Brugger <mbrugger@suse.com>,
	Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com>
Cc: linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org,
	linux-kernel@vger.kernel.org, NXP S32 Linux Team <s32@nxp.com>,
	Andrei Stefanescu <andrei.stefanescu@oss.nxp.com>,
	Florin Buica <florin.buica@nxp.com>
Subject: [PATCH 1/3] pinctrl: s32cc: enable the input buffer for a GPIO
Date: Tue, 23 Jul 2024 16:18:30 +0300	[thread overview]
Message-ID: <20240723131832.1171036-2-andrei.stefanescu@oss.nxp.com> (raw)
In-Reply-To: <20240723131832.1171036-1-andrei.stefanescu@oss.nxp.com>

The IBE (input buffer enable) should be enabled for a GPIO. Reading the
value will return the one from the input register, writing the value
will return the one from the output register.

This offers the flexibility to check if the value intended to be set
matches the actual physical one.

Signed-off-by: Florin Buica <florin.buica@nxp.com>
Signed-off-by: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com>
---
 drivers/pinctrl/nxp/pinctrl-s32cc.c | 17 ++++++++---------
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/drivers/pinctrl/nxp/pinctrl-s32cc.c b/drivers/pinctrl/nxp/pinctrl-s32cc.c
index f0cad2c501f7..1f58772c472e 100644
--- a/drivers/pinctrl/nxp/pinctrl-s32cc.c
+++ b/drivers/pinctrl/nxp/pinctrl-s32cc.c
@@ -2,7 +2,7 @@
 /*
  * Core driver for the S32 CC (Common Chassis) pin controller
  *
- * Copyright 2017-2022 NXP
+ * Copyright 2017-2022,2024 NXP
  * Copyright (C) 2022 SUSE LLC
  * Copyright 2015-2016 Freescale Semiconductor, Inc.
  */
@@ -436,16 +436,15 @@ static int s32_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
 				      unsigned int offset,
 				      bool input)
 {
-	unsigned int config;
+	/* Always enable IBE for GPIOs. This allows us to read the
+	 * actual line value and compare it with the one set.
+	 */
+	unsigned int config = S32_MSCR_IBE;
 	unsigned int mask = S32_MSCR_IBE | S32_MSCR_OBE;
 
-	if (input) {
-		/* Disable output buffer and enable input buffer */
-		config = S32_MSCR_IBE;
-	} else {
-		/* Disable input buffer and enable output buffer */
-		config = S32_MSCR_OBE;
-	}
+	/* Enable output buffer */
+	if (!input)
+		config |= S32_MSCR_OBE;
 
 	return s32_regmap_update(pctldev, offset, mask, config);
 }
-- 
2.45.2


  reply	other threads:[~2024-07-23 13:19 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-23 13:18 [PATCH 0/3] add small improvements to the S32G pinctrl driver Andrei Stefanescu
2024-07-23 13:18 ` Andrei Stefanescu [this message]
2024-07-23 13:18 ` [PATCH 2/3] pinctrl: s32cc: configure PIN_CONFIG_DRIVE_PUSH_PULL Andrei Stefanescu
2024-07-23 13:18 ` [PATCH 3/3] pinctrl: s32cc: add update and overwrite options when setting pinconf Andrei Stefanescu
2024-08-05  8:18 ` [PATCH 0/3] add small improvements to the S32G pinctrl driver Linus Walleij

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