From: Lee Jones <lee@kernel.org>
To: Lorenzo Bianconi <lorenzo@kernel.org>
Cc: "Linus Walleij" <linus.walleij@linaro.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Sean Wang" <sean.wang@kernel.org>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
"AngeloGioacchino Del Regno"
<angelogioacchino.delregno@collabora.com>,
"Uwe Kleine-König" <ukleinek@kernel.org>,
linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
upstream@airoha.com, benjamin.larsson@genexis.eu,
ansuelsmth@gmail.com, linux-pwm@vger.kernel.org
Subject: Re: [PATCH v3 2/5] dt-bindings: mfd: Add support for Airoha EN7581 GPIO System Controller
Date: Tue, 3 Sep 2024 16:33:53 +0100 [thread overview]
Message-ID: <20240903153353.GZ6858@google.com> (raw)
In-Reply-To: <20240831-en7581-pinctrl-v3-2-98eebfb4da66@kernel.org>
On Sat, 31 Aug 2024, Lorenzo Bianconi wrote:
> From: Christian Marangi <ansuelsmth@gmail.com>
>
> Add support for Airoha EN7581 GPIO System Controller which provide a
> register map for controlling the GPIO, pinctrl and PWM of the SoC.
>
> Schema define cells for both gpio/interrupt controller and PWM.
> Moreover it provides a dedicated pinctrl node for pins and config
> definitions.
>
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org>
> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
> ---
> .../bindings/mfd/airoha,en7581-gpio-sysctl.yaml | 433 +++++++++++++++++++++
> 1 file changed, 433 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mfd/airoha,en7581-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/airoha,en7581-gpio-sysctl.yaml
> new file mode 100644
> index 000000000000..a9080c7f50f9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/airoha,en7581-gpio-sysctl.yaml
> @@ -0,0 +1,433 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mfd/airoha,en7581-gpio-sysctl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Airoha EN7581 GPIO System Controller
> +
> +maintainers:
> + - Christian Marangi <ansuelsmth@gmail.com>
> + - Lorenzo Bianconi <lorenzo@kernel.org>
> +
> +description:
> + Airoha EN7581 SoC GPIO system controller which provided a register map
> + for controlling the GPIO, pins and PWM of the SoC.
This whole thing is just about pins.
The MFD portion of this submission doesn't do anything.
Please rework this to omit the MFD driver.
After just a glance, it looks like simple-mfd _might_ work.
> +properties:
> + compatible:
> + const: airoha,en7581-gpio-sysctl
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + gpio-controller: true
> +
> + '#gpio-cells':
> + const: 2
> +
> + interrupt-controller: true
> +
> + '#interrupt-cells':
> + const: 2
> +
> + "#pwm-cells":
> + const: 3
> +
> + pinctrl:
> + type: object
> +
> + $ref: /schemas/pinctrl/pinctrl.yaml
> +
> + patternProperties:
> + '-pins$':
> + type: object
> +
> + patternProperties:
> + '^.*mux.*$':
> + type: object
> +
> + description:
> + pinmux configuration nodes.
> +
> + $ref: /schemas/pinctrl/pinmux-node.yaml
> +
> + properties:
> + function:
> + description:
> + A string containing the name of the function to mux to the group.
> + enum: [pon, tod_1pps, sipo, mdio, uart, i2c, jtag, pcm, spi,
> + pcm_spi, i2s, emmc, pnand, pcie_reset, pwm, phy1_led0,
> + phy2_led0, phy3_led0, phy4_led0, phy1_led1, phy2_led1,
> + phy3_led1, phy4_led1]
> +
> + groups:
> + description:
> + An array of strings. Each string contains the name of a group.
> +
> + required:
> + - function
> + - groups
> +
> + allOf:
> + - if:
> + properties:
> + function:
> + const: pon
> + then:
> + properties:
> + groups:
> + enum: [pon]
> + - if:
> + properties:
> + function:
> + const: tod_1pps
> + then:
> + properties:
> + groups:
> + enum: [pon_tod_1pps, gsw_tod_1pps]
> + - if:
> + properties:
> + function:
> + const: sipo
> + then:
> + properties:
> + groups:
> + enum: [sipo, sipo_rclk]
> + - if:
> + properties:
> + function:
> + const: mdio
> + then:
> + properties:
> + groups:
> + enum: [mdio]
> + - if:
> + properties:
> + function:
> + const: uart
> + then:
> + properties:
> + groups:
> + items:
> + enum: [uart2, uart2_cts_rts, hsuart, hsuart_cts_rts, uart4,
> + uart5]
> + maxItems: 2
> + - if:
> + properties:
> + function:
> + const: i2c
> + then:
> + properties:
> + groups:
> + enum: [i2c1]
> + - if:
> + properties:
> + function:
> + const: jtag
> + then:
> + properties:
> + groups:
> + enum: [jtag_udi, jtag_dfd]
> + - if:
> + properties:
> + function:
> + const: pcm
> + then:
> + properties:
> + groups:
> + enum: [pcm1, pcm2]
> + - if:
> + properties:
> + function:
> + const: spi
> + then:
> + properties:
> + groups:
> + items:
> + enum: [spi_quad, spi_cs1]
> + maxItems: 2
> + - if:
> + properties:
> + function:
> + const: pcm_spi
> + then:
> + properties:
> + groups:
> + items:
> + enum: [pcm_spi, pcm_spi_int, pcm_spi_rst, pcm_spi_cs1,
> + pcm_spi_cs2_p156, pcm_spi_cs2_p128, pcm_spi_cs3,
> + pcm_spi_cs4]
> + maxItems: 7
> + - if:
> + properties:
> + function:
> + const: i2c
> + then:
> + properties:
> + groups:
> + enum: [i2s]
> + - if:
> + properties:
> + function:
> + const: emmc
> + then:
> + properties:
> + groups:
> + enum: [emmc]
> + - if:
> + properties:
> + function:
> + const: pnand
> + then:
> + properties:
> + groups:
> + enum: [pnand]
> + - if:
> + properties:
> + function:
> + const: pcie_reset
> + then:
> + properties:
> + groups:
> + enum: [pcie_reset0, pcie_reset1, pcie_reset2]
> + - if:
> + properties:
> + function:
> + const: pwm
> + then:
> + properties:
> + groups:
> + enum: [gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6,
> + gpio7, gpio8, gpio9, gpio10, gpio11, gpio12, gpio13,
> + gpio14, gpio15, gpio16, gpio17, gpio18, gpio19,
> + gpio20, gpio21, gpio22, gpio23, gpio24, gpio25,
> + gpio26, gpio27, gpio28, gpio29, gpio30, gpio31,
> + gpio36, gpio37, gpio38, gpio39, gpio40, gpio41,
> + gpio42, gpio43, gpio44, gpio45, gpio46, gpio47]
> + - if:
> + properties:
> + function:
> + const: phy1_led0
> + then:
> + properties:
> + groups:
> + enum: [gpio33, gpio34, gpio35, gpio42]
> + - if:
> + properties:
> + function:
> + const: phy2_led0
> + then:
> + properties:
> + groups:
> + enum: [gpio33, gpio34, gpio35, gpio42]
> + - if:
> + properties:
> + function:
> + const: phy3_led0
> + then:
> + properties:
> + groups:
> + enum: [gpio33, gpio34, gpio35, gpio42]
> + - if:
> + properties:
> + function:
> + const: phy4_led0
> + then:
> + properties:
> + groups:
> + enum: [gpio33, gpio34, gpio35, gpio42]
> + - if:
> + properties:
> + function:
> + const: phy1_led1
> + then:
> + properties:
> + groups:
> + enum: [gpio43, gpio44, gpio45, gpio46]
> + - if:
> + properties:
> + function:
> + const: phy2_led1
> + then:
> + properties:
> + groups:
> + enum: [gpio43, gpio44, gpio45, gpio46]
> + - if:
> + properties:
> + function:
> + const: phy3_led1
> + then:
> + properties:
> + groups:
> + enum: [gpio43, gpio44, gpio45, gpio46]
> + - if:
> + properties:
> + function:
> + const: phy4_led1
> + then:
> + properties:
> + groups:
> + enum: [gpio43, gpio44, gpio45, gpio46]
> +
> + additionalProperties: false
> +
> + '^.*conf.*$':
> + type: object
> +
> + description:
> + pinconf configuration nodes.
> +
> + $ref: /schemas/pinctrl/pincfg-node.yaml
> +
> + properties:
> + pins:
> + description:
> + An array of strings. Each string contains the name of a pin.
> + items:
> + enum: [uart1_txd, uart1_rxd, i2c_scl, i2c_sda, spi_cs0, spi_clk,
> + spi_mosi, spi_miso, gpio0, gpio1, gpio2, gpio3, gpio4,
> + gpio5, gpio6, gpio7, gpio8, gpio9, gpio10, gpio11, gpio12,
> + gpio13, gpio14, gpio15, gpio16, gpio17, gpio18, gpio19,
> + gpio20, gpio21, gpio22, gpio23, gpio24, gpio25, gpio26,
> + gpio27, gpio28, gpio29, gpio30, gpio31, gpio32, gpio33,
> + gpio34, gpio35, gpio36, gpio37, gpio38, gpio39, gpio40,
> + gpio41, gpio42, gpio43, gpio44, gpio45, gpio46,
> + pcie_reset0, pcie_reset1, pcie_reset2]
> + minItems: 1
> + maxItems: 58
> +
> + bias-disable: true
> +
> + bias-pull-up: true
> +
> + bias-pull-down: true
> +
> + input-enable: true
> +
> + output-enable: true
> +
> + output-low: true
> +
> + output-high: true
> +
> + drive-open-drain: true
> +
> + drive-strength:
> + description:
> + Selects the drive strength for MIO pins, in mA.
> + enum: [2, 4, 6, 8]
> +
> + required:
> + - pins
> +
> + additionalProperties: false
> +
> + additionalProperties: false
> +
> + additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - gpio-controller
> + - "#gpio-cells"
> + - "#pwm-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + mfd@1fbf0200 {
> + compatible = "airoha,en7581-gpio-sysctl";
> + reg = <0x1fbf0200 0xc0>;
> +
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> +
> + #pwm-cells = <3>;
> +
> + pinctrl {
> + pcie1-rst-pins {
> + conf {
> + pins = "pcie_reset1";
> + drive-open-drain = <1>;
> + };
> + };
> +
> + pwm-pins {
> + mux {
> + function = "pwm";
> + groups = "gpio18";
> + };
> + };
> +
> + spi-pins {
> + mux {
> + function = "spi";
> + groups = "spi_quad", "spi_cs1";
> + };
> + };
> +
> + uart2-pins {
> + mux {
> + function = "uart";
> + groups = "uart2", "uart2_cts_rts";
> + };
> + };
> +
> + uar5-pins {
> + mux {
> + function = "uart";
> + groups = "uart5";
> + };
> + };
> +
> + mmc-pins {
> + mux {
> + function = "emmc";
> + groups = "emmc";
> + };
> + };
> +
> + mdio-pins {
> + mux {
> + function = "mdio";
> + groups = "mdio";
> + };
> +
> + conf {
> + pins = "gpio2";
> + output-enable;
> + };
> + };
> +
> + gswp1-led0-pins {
> + mux {
> + function = "phy1_led0";
> + groups = "gpio33";
> + };
> + };
> +
> + gswp2-led1-pins {
> + mux {
> + function = "phy2_led1";
> + groups = "gpio44";
> + };
> + };
> + };
> + };
> +
> +...
>
> --
> 2.46.0
>
--
Lee Jones [李琼斯]
next prev parent reply other threads:[~2024-09-03 15:34 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-31 14:27 [PATCH v3 0/5] Add mfd, pinctrl and pwm support to EN7581 SoC Lorenzo Bianconi
2024-08-31 14:27 ` [PATCH v3 1/5] dt-bindings: arm: airoha: Add the chip-scu node for " Lorenzo Bianconi
2024-09-03 15:05 ` Rob Herring (Arm)
2024-08-31 14:27 ` [PATCH v3 2/5] dt-bindings: mfd: Add support for Airoha EN7581 GPIO System Controller Lorenzo Bianconi
2024-09-03 15:09 ` Rob Herring
2024-09-03 15:33 ` Lee Jones [this message]
2024-09-03 14:00 ` Christian Marangi
2024-09-03 16:42 ` Lee Jones
2024-09-04 11:06 ` Christian Marangi
2024-08-31 14:27 ` [PATCH v3 3/5] mfd: airoha: Add support for Airoha EN7581 MFD Lorenzo Bianconi
2024-08-31 14:27 ` [PATCH v3 4/5] pinctrl: airoha: Add support for EN7581 SoC Lorenzo Bianconi
2024-08-31 17:35 ` kernel test robot
2024-09-01 12:46 ` kernel test robot
2024-09-01 13:28 ` kernel test robot
2024-08-31 14:27 ` [PATCH v3 5/5] pwm: " Lorenzo Bianconi
2024-09-03 10:46 ` Uwe Kleine-König
2024-09-03 11:58 ` Benjamin Larsson
2024-09-03 15:47 ` Uwe Kleine-König
2024-09-04 23:09 ` Benjamin Larsson
2024-09-05 9:30 ` Uwe Kleine-König
2024-09-05 12:18 ` Benjamin Larsson
2024-09-05 15:39 ` Uwe Kleine-König
2024-09-05 18:35 ` Benjamin Larsson
2024-09-06 8:01 ` Uwe Kleine-König
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