From: Conor Dooley <conor@kernel.org>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Conor Dooley <conor.dooley@microchip.com>,
linux-kernel@vger.kernel.org, Marc Zyngier <maz@kernel.org>,
Daire McNamara <daire.mcnamara@microchip.com>,
Bartosz Golaszewski <brgl@bgdev.pl>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org,
Lewis Hanly <lewis.hanly@microchip.com>
Subject: Re: [RFC v7 4/6] gpio: mpfs: add polarfire soc gpio support
Date: Wed, 16 Oct 2024 10:56:32 +0100 [thread overview]
Message-ID: <20241016-shallot-nerd-51eeba039ba0@spud> (raw)
In-Reply-To: <CACRpkdbRE695f-+do1HYpOZ6e4qxgUBWJzEPO2hTCuZ3xxYHQg@mail.gmail.com>
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On Mon, Aug 05, 2024 at 10:04:53AM +0200, Linus Walleij wrote:
> On Tue, Jul 23, 2024 at 1:28 PM Conor Dooley <conor.dooley@microchip.com> wrote:
>
>
> > From: Lewis Hanly <lewis.hanly@microchip.com>
> >
> > Add a driver to support the Polarfire SoC gpio controller
> >
> > Signed-off-by: Lewis Hanly <lewis.hanly@microchip.com>
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
>
> Just a comment on second thought:
>
> > +config GPIO_POLARFIRE_SOC
> > + bool "Microchip FPGA GPIO support"
> > + depends on OF_GPIO
> > + select GPIOLIB_IRQCHIP
>
> select GPIO_GENERIC?
>
> > +static int mpfs_gpio_direction_input(struct gpio_chip *gc, unsigned int gpio_index)
> > +{
> > + struct mpfs_gpio_chip *mpfs_gpio = gpiochip_get_data(gc);
> > + u32 gpio_cfg;
> > + unsigned long flags;
> > +
> > + raw_spin_lock_irqsave(&mpfs_gpio->lock, flags);
> > +
> > + gpio_cfg = readl(mpfs_gpio->base + MPFS_GPIO_CTRL(gpio_index));
> > + gpio_cfg |= MPFS_GPIO_EN_IN;
> > + gpio_cfg &= ~(MPFS_GPIO_EN_OUT | MPFS_GPIO_EN_OUT_BUF);
>
> OK this part is unique...
>
> > +static int mpfs_gpio_direction_output(struct gpio_chip *gc, unsigned int gpio_index, int value)
> > +{
> > + struct mpfs_gpio_chip *mpfs_gpio = gpiochip_get_data(gc);
> > + u32 gpio_cfg;
> > + unsigned long flags;
> > +
> > + raw_spin_lock_irqsave(&mpfs_gpio->lock, flags);
> > +
> > + gpio_cfg = readl(mpfs_gpio->base + MPFS_GPIO_CTRL(gpio_index));
> > + gpio_cfg |= MPFS_GPIO_EN_OUT | MPFS_GPIO_EN_OUT_BUF;
>
> Also here
>
> > +static int mpfs_gpio_get_direction(struct gpio_chip *gc,
> > + unsigned int gpio_index)
> > +static int mpfs_gpio_get(struct gpio_chip *gc,
> > + unsigned int gpio_index)
> > +static void mpfs_gpio_set(struct gpio_chip *gc, unsigned int gpio_index, int value)
>
> But these are just MMIO functions.
>
> Is it possible to use augmented generic MMIO, i.e just override these
> two functions that
> need special handling?
So, I've been looking into this again (finally), with an eye to stripping
the interrupt handling bits out, and trying to upstream this in pieces.
I dunno if I'm making a mistake here, but I don't know if there's much
value in implementing this suggestion - as far as I can tell only the
get()/set() functions can be replaced by what's provided by gpio-mmio.c.
There are no controller wide registers that control direction and so
bgpio_get_dir() can't be used - direction is read from the same
mpfs_gpio->base + MPFS_GPIO_CTRL(gpio_index) registers that it is set
using. Adding bgpio stuff, to just go ahead and overwrite it, to save on
trivial get()/set() implementations seems to me like adding complication
rather than removing it. What am I missing here?
Cheers,
Conor.
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next prev parent reply other threads:[~2024-10-16 9:56 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-23 11:27 [RFC v7 0/6] PolarFire SoC GPIO support Conor Dooley
2024-07-23 11:27 ` [RFC v7 1/6] dt-bindings: gpio: fix microchip,mpfs-gpio interrupt descriptions Conor Dooley
2024-07-24 13:25 ` Krzysztof Kozlowski
2024-07-24 14:29 ` Conor Dooley
2024-07-23 11:27 ` [RFC v7 2/6] dt-bindings: interrupt-controller: document PolarFire SoC's gpio interrupt mux Conor Dooley
2024-07-24 13:27 ` Krzysztof Kozlowski
2024-07-24 14:21 ` Conor Dooley
2024-07-23 11:27 ` [RFC v7 3/6] irqchip: add mpfs " Conor Dooley
2024-07-29 10:41 ` Thomas Gleixner
2024-08-01 15:09 ` Conor Dooley
2024-08-01 18:49 ` Thomas Gleixner
2024-08-02 8:08 ` Conor Dooley
2024-08-02 10:40 ` Thomas Gleixner
2024-07-23 11:27 ` [RFC v7 4/6] gpio: mpfs: add polarfire soc gpio support Conor Dooley
2024-08-05 8:00 ` Linus Walleij
2024-08-05 8:04 ` Linus Walleij
2024-08-06 17:18 ` Conor Dooley
2024-08-07 16:55 ` Linus Walleij
2024-08-07 17:22 ` Conor Dooley
2024-10-16 9:56 ` Conor Dooley [this message]
2024-10-16 10:29 ` Conor Dooley
2024-10-16 19:26 ` Linus Walleij
2024-10-16 19:42 ` Conor Dooley
2024-10-22 16:28 ` Conor Dooley
2024-10-23 9:58 ` Linus Walleij
2024-10-16 19:25 ` Linus Walleij
2024-07-23 11:27 ` [RFC v7 5/6] gpio: mpfs: pass gpio line number as irq data Conor Dooley
2024-08-05 8:11 ` Linus Walleij
2024-08-06 17:24 ` Conor Dooley
2024-07-23 11:27 ` [RFC v7 6/6] riscv: dts: microchip: update gpio interrupts to better match the SoC Conor Dooley
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