From: Andre Przywara <andre.przywara@arm.com>
To: Linus Walleij <linus.walleij@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>
Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: [PATCH 0/7] pinctrl: sunxi: Add Allwinner A523 support
Date: Mon, 11 Nov 2024 00:57:43 +0000 [thread overview]
Message-ID: <20241111005750.13071-1-andre.przywara@arm.com> (raw)
Hi,
this series introduces pinctrl support for the Allwinner A523 family
of SoCs (comprising A523, A527, T527). [1]
The first three patches extend the sunxi pinctrl core code to deal with
some specialities of the new SoC: it uses every of the 11 possible banks
except the first one, which required some register remapping. The first
patch here is actually some cleanup, which we should take regardless, I
think, since it fixes some hack we introduced with the D1 support.
The main feature is actually patch 4, which introduces a new way to
express the required pinmux values for each function/pin pair.
Traditionally, we dumped a rather large table of data into the (single
image!) kernel for that, but this approach now puts that value into
the DT, and builds the table at runtime. This patch was posted twice
before [1][2], the last time LinusW seemed to be fine with the idea,
just complained about the abuse of the generic pinmux property. I changed
that to allwinner,pinmux now. For yet another alternative, see below.
The rest of the patches are the usual suspects: the two files for the
two pinctrl instances of the new SoC (now very small), and the DT
binding.
Based on v6.12-rc1. Please have a look, review and test!
Cheers,
Andre
[1] https://linux-sunxi.org/A523#Family_of_sun55iw3
[2] https://patchwork.ozlabs.org/project/linux-gpio/cover/20171113012523.2328-1-andre.przywara@arm.com/
[3] https://lore.kernel.org/linux-arm-kernel/20221110014255.20711-1-andre.przywara@arm.com/
P.S. LinusW's comment about "pinmux" being something different made me
think about whether we should adopt an even different approach, and
follow the Apple silicon GPIO driver. That conflates the existing "pins"
and "allwinner,pinmux" properties into the standard "pinmux" one, like
this:
uart0_pb_pins: uart0-pb-pins {
pinmux = <SUNXI_PIN(PB, 9, 2)>,
<SUNXI_PIN(PB, 10, 2)>;
function = "uart0";
};
That looks like a neat solution to me, with the huge drawback of
requiring a completely different of_xlate function, which I guess means
a more or less completely separate pinctrl driver.
Let me know if you think that's worthwhile.
Andre Przywara (7):
pinctrl: sunxi: refactor pinctrl variants into flags
pinctrl: sunxi: move bank K register offset
pinctrl: sunxi: support moved power configuration registers
pinctrl: sunxi: allow reading mux values from DT
dt-bindings: pinctrl: add compatible for Allwinner A523/T527
pinctrl: sunxi: Add support for the Allwinner A523
pinctrl: sunxi: Add support for the secondary A523 GPIO ports
.../pinctrl/allwinner,sun4i-a10-pinctrl.yaml | 23 +-
drivers/pinctrl/sunxi/Kconfig | 10 +
drivers/pinctrl/sunxi/Makefile | 3 +
drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c | 6 +-
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 8 +-
drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c | 54 +++
drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c | 54 +++
drivers/pinctrl/sunxi/pinctrl-sun5i.c | 8 +-
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c | 8 +-
drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c | 7 +-
drivers/pinctrl/sunxi/pinctrl-sunxi-dt.c | 357 ++++++++++++++++++
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 54 ++-
drivers/pinctrl/sunxi/pinctrl-sunxi.h | 45 ++-
13 files changed, 586 insertions(+), 51 deletions(-)
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sunxi-dt.c
--
2.46.2
next reply other threads:[~2024-11-11 0:57 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-11 0:57 Andre Przywara [this message]
2024-11-11 0:57 ` [PATCH 1/7] pinctrl: sunxi: refactor pinctrl variants into flags Andre Przywara
2025-01-18 10:07 ` Jernej Škrabec
2024-11-11 0:57 ` [PATCH 2/7] pinctrl: sunxi: move bank K register offset Andre Przywara
2024-11-11 0:57 ` [PATCH 3/7] pinctrl: sunxi: support moved power configuration registers Andre Przywara
2024-11-11 0:57 ` [PATCH 4/7] pinctrl: sunxi: allow reading mux values from DT Andre Przywara
2024-11-11 0:57 ` [PATCH 5/7] dt-bindings: pinctrl: add compatible for Allwinner A523/T527 Andre Przywara
2024-11-12 15:38 ` Rob Herring
2024-11-13 8:50 ` Chen-Yu Tsai
2024-11-20 10:12 ` Andre Przywara
2025-01-14 7:01 ` Chen-Yu Tsai
2025-01-14 11:21 ` Andre Przywara
2025-01-14 14:21 ` Chen-Yu Tsai
2024-11-11 0:57 ` [PATCH 6/7] pinctrl: sunxi: Add support for the Allwinner A523 Andre Przywara
2024-11-11 0:57 ` [PATCH 7/7] pinctrl: sunxi: Add support for the secondary A523 GPIO ports Andre Przywara
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20241111005750.13071-1-andre.przywara@arm.com \
--to=andre.przywara@arm.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=jernej.skrabec@gmail.com \
--cc=krzk+dt@kernel.org \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-sunxi@lists.linux.dev \
--cc=robh@kernel.org \
--cc=samuel@sholland.org \
--cc=wens@csie.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox