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From: Mathieu Dubois-Briand <mathieu.dubois-briand@bootlin.com>
To: "Lee Jones" <lee@kernel.org>, "Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Kamel Bouhara" <kamel.bouhara@bootlin.com>,
	"Linus Walleij" <linus.walleij@linaro.org>,
	"Bartosz Golaszewski" <brgl@bgdev.pl>,
	"Dmitry Torokhov" <dmitry.torokhov@gmail.com>,
	"Uwe Kleine-König" <ukleinek@kernel.org>,
	"Michael Walle" <mwalle@kernel.org>,
	"Mark Brown" <broonie@kernel.org>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	"Danilo Krummrich" <dakr@kernel.org>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-gpio@vger.kernel.org, linux-input@vger.kernel.org,
	linux-pwm@vger.kernel.org, andriy.shevchenko@intel.com,
	"Grégory Clement" <gregory.clement@bootlin.com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Mathieu Dubois-Briand" <mathieu.dubois-briand@bootlin.com>
Subject: [PATCH v5 05/11] regmap: irq: Add support for chips without separate IRQ status
Date: Tue, 18 Mar 2025 17:26:21 +0100	[thread overview]
Message-ID: <20250318-mdb-max7360-support-v5-5-fb20baf97da0@bootlin.com> (raw)
In-Reply-To: <20250318-mdb-max7360-support-v5-0-fb20baf97da0@bootlin.com>

Some GPIO chips allow to rise an IRQ on GPIO level changes but do not
provide an IRQ status for each separate line: only the current gpio
level can be retrieved.

Add support for these chips, emulating IRQ status by comparing GPIO
levels with the levels during the previous interrupt.

Signed-off-by: Mathieu Dubois-Briand <mathieu.dubois-briand@bootlin.com>
---
 drivers/base/regmap/regmap-irq.c | 97 +++++++++++++++++++++++++++-------------
 include/linux/regmap.h           |  3 ++
 2 files changed, 69 insertions(+), 31 deletions(-)

diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c
index 0bcd81389a29..0e53b64d028d 100644
--- a/drivers/base/regmap/regmap-irq.c
+++ b/drivers/base/regmap/regmap-irq.c
@@ -33,6 +33,7 @@ struct regmap_irq_chip_data {
 	void *status_reg_buf;
 	unsigned int *main_status_buf;
 	unsigned int *status_buf;
+	unsigned int *prev_status_buf;
 	unsigned int *mask_buf;
 	unsigned int *mask_buf_def;
 	unsigned int *wake_buf;
@@ -332,27 +333,13 @@ static inline int read_sub_irq_data(struct regmap_irq_chip_data *data,
 	return ret;
 }
 
-static irqreturn_t regmap_irq_thread(int irq, void *d)
+static int read_irq_data(struct regmap_irq_chip_data *data)
 {
-	struct regmap_irq_chip_data *data = d;
 	const struct regmap_irq_chip *chip = data->chip;
 	struct regmap *map = data->map;
 	int ret, i;
-	bool handled = false;
 	u32 reg;
 
-	if (chip->handle_pre_irq)
-		chip->handle_pre_irq(chip->irq_drv_data);
-
-	if (chip->runtime_pm) {
-		ret = pm_runtime_get_sync(map->dev);
-		if (ret < 0) {
-			dev_err(map->dev, "IRQ thread failed to resume: %d\n",
-				ret);
-			goto exit;
-		}
-	}
-
 	/*
 	 * Read only registers with active IRQs if the chip has 'main status
 	 * register'. Else read in the statuses, using a single bulk read if
@@ -379,10 +366,8 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)
 			reg = data->get_irq_reg(data, chip->main_status, i);
 			ret = regmap_read(map, reg, &data->main_status_buf[i]);
 			if (ret) {
-				dev_err(map->dev,
-					"Failed to read IRQ status %d\n",
-					ret);
-				goto exit;
+				dev_err(map->dev, "Failed to read IRQ status %d\n", ret);
+				return ret;
 			}
 		}
 
@@ -398,10 +383,8 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)
 				ret = read_sub_irq_data(data, b);
 
 				if (ret != 0) {
-					dev_err(map->dev,
-						"Failed to read IRQ status %d\n",
-						ret);
-					goto exit;
+					dev_err(map->dev, "Failed to read IRQ status %d\n", ret);
+					return ret;
 				}
 			}
 
@@ -418,9 +401,8 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)
 				       data->status_reg_buf,
 				       chip->num_regs);
 		if (ret != 0) {
-			dev_err(map->dev, "Failed to read IRQ status: %d\n",
-				ret);
-			goto exit;
+			dev_err(map->dev, "Failed to read IRQ status: %d\n", ret);
+			return ret;
 		}
 
 		for (i = 0; i < data->chip->num_regs; i++) {
@@ -436,7 +418,7 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)
 				break;
 			default:
 				BUG();
-				goto exit;
+				return ret;
 			}
 		}
 
@@ -447,10 +429,8 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)
 			ret = regmap_read(map, reg, &data->status_buf[i]);
 
 			if (ret != 0) {
-				dev_err(map->dev,
-					"Failed to read IRQ status: %d\n",
-					ret);
-				goto exit;
+				dev_err(map->dev, "Failed to read IRQ status: %d\n", ret);
+				return ret;
 			}
 		}
 	}
@@ -459,6 +439,42 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)
 		for (i = 0; i < data->chip->num_regs; i++)
 			data->status_buf[i] = ~data->status_buf[i];
 
+	return 0;
+}
+
+static irqreturn_t regmap_irq_thread(int irq, void *d)
+{
+	struct regmap_irq_chip_data *data = d;
+	const struct regmap_irq_chip *chip = data->chip;
+	struct regmap *map = data->map;
+	int ret, i;
+	bool handled = false;
+	u32 reg;
+
+	if (chip->handle_pre_irq)
+		chip->handle_pre_irq(chip->irq_drv_data);
+
+	if (chip->runtime_pm) {
+		ret = pm_runtime_get_sync(map->dev);
+		if (ret < 0) {
+			dev_err(map->dev, "IRQ thread failed to resume: %d\n", ret);
+			goto exit;
+		}
+	}
+
+	ret = read_irq_data(data);
+	if (ret < 0)
+		goto exit;
+
+	if (chip->status_is_level) {
+		for (i = 0; i < data->chip->num_regs; i++) {
+			unsigned int val = data->status_buf[i];
+
+			data->status_buf[i] ^= data->prev_status_buf[i];
+			data->prev_status_buf[i] = val;
+		}
+	}
+
 	/*
 	 * Ignore masked IRQs and ack if we need to; we ack early so
 	 * there is no race between handling and acknowledging the
@@ -705,6 +721,13 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
 	if (!d->status_buf)
 		goto err_alloc;
 
+	if (chip->status_is_level) {
+		d->prev_status_buf = kcalloc(chip->num_regs, sizeof(*d->prev_status_buf),
+					     GFP_KERNEL);
+		if (!d->prev_status_buf)
+			goto err_alloc;
+	}
+
 	d->mask_buf = kcalloc(chip->num_regs, sizeof(*d->mask_buf),
 			      GFP_KERNEL);
 	if (!d->mask_buf)
@@ -881,6 +904,16 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
 		}
 	}
 
+	/* Store current levels */
+	if (chip->status_is_level) {
+		ret = read_irq_data(d);
+		if (ret < 0)
+			goto err_alloc;
+
+		memcpy(d->prev_status_buf, d->status_buf,
+		       d->chip->num_regs * sizeof(d->prev_status_buf[0]));
+	}
+
 	ret = regmap_irq_create_domain(fwnode, irq_base, chip, d);
 	if (ret)
 		goto err_alloc;
@@ -907,6 +940,7 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
 	kfree(d->mask_buf_def);
 	kfree(d->mask_buf);
 	kfree(d->status_buf);
+	kfree(d->prev_status_buf);
 	kfree(d->status_reg_buf);
 	if (d->config_buf) {
 		for (i = 0; i < chip->num_config_bases; i++)
@@ -983,6 +1017,7 @@ void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)
 	kfree(d->mask_buf);
 	kfree(d->status_reg_buf);
 	kfree(d->status_buf);
+	kfree(d->prev_status_buf);
 	if (d->config_buf) {
 		for (i = 0; i < d->chip->num_config_bases; i++)
 			kfree(d->config_buf[i]);
diff --git a/include/linux/regmap.h b/include/linux/regmap.h
index 3a96d068915f..159527e97f00 100644
--- a/include/linux/regmap.h
+++ b/include/linux/regmap.h
@@ -1640,6 +1640,8 @@ struct regmap_irq_chip_data;
  * @ack_invert:  Inverted ack register: cleared bits for ack.
  * @clear_ack:  Use this to set 1 and 0 or vice-versa to clear interrupts.
  * @status_invert: Inverted status register: cleared bits are active interrupts.
+ * @status_is_level: Status register is actuall signal level: Xor status
+ *		     register with previous value to get active interrupts.
  * @wake_invert: Inverted wake register: cleared bits are wake enabled.
  * @type_in_mask: Use the mask registers for controlling irq type. Use this if
  *		  the hardware provides separate bits for rising/falling edge
@@ -1703,6 +1705,7 @@ struct regmap_irq_chip {
 	unsigned int ack_invert:1;
 	unsigned int clear_ack:1;
 	unsigned int status_invert:1;
+	unsigned int status_is_level:1;
 	unsigned int wake_invert:1;
 	unsigned int type_in_mask:1;
 	unsigned int clear_on_unmask:1;

-- 
2.39.5


  parent reply	other threads:[~2025-03-18 16:26 UTC|newest]

Thread overview: 69+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-18 16:26 [PATCH v5 00/11] Add support for MAX7360 Mathieu Dubois-Briand
2025-03-18 16:26 ` [PATCH v5 01/11] dt-bindings: mfd: gpio: Add MAX7360 Mathieu Dubois-Briand
2025-03-18 17:39   ` Rob Herring
2025-03-19 16:43     ` Mathieu Dubois-Briand
2025-03-31  8:47   ` Mathieu Dubois-Briand
2025-03-18 16:26 ` [PATCH v5 02/11] mfd: Add max7360 support mathieu.dubois-briand
2025-03-19 11:10   ` Andy Shevchenko
2025-03-25 16:26     ` Mathieu Dubois-Briand
2025-03-25 16:40       ` Andy Shevchenko
2025-03-18 16:26 ` [PATCH v5 03/11] pinctrl: Add MAX7360 pinctrl driver Mathieu Dubois-Briand
2025-03-19 11:13   ` Linus Walleij
2025-03-19 11:35   ` Andy Shevchenko
2025-03-18 16:26 ` [PATCH v5 04/11] pwm: max7360: Add MAX7360 PWM support mathieu.dubois-briand
2025-03-19 11:18   ` Andy Shevchenko
2025-03-20  7:50     ` Uwe Kleine-König
2025-03-20 10:48       ` Andy Shevchenko
2025-03-25 14:37         ` Mathieu Dubois-Briand
2025-03-25 15:56           ` Andy Shevchenko
2025-03-26 14:44             ` Mathieu Dubois-Briand
2025-03-26 15:49               ` Andy Shevchenko
2025-03-26 17:46                 ` Uwe Kleine-König
2025-03-27  9:30                   ` Andy Shevchenko
2025-03-27 14:28                 ` Mathieu Dubois-Briand
2025-03-27 17:50                   ` Andy Shevchenko
2025-03-28  8:13                     ` Mathieu Dubois-Briand
2025-03-28 12:35                       ` Andy Shevchenko
2025-03-25 14:29     ` Mathieu Dubois-Briand
2025-03-25 15:41       ` Andy Shevchenko
2025-03-19 12:57   ` kernel test robot
2025-03-20  2:25   ` kernel test robot
2025-03-18 16:26 ` Mathieu Dubois-Briand [this message]
2025-03-18 16:39   ` [PATCH v5 05/11] regmap: irq: Add support for chips without separate IRQ status Andy Shevchenko
2025-03-20  8:45     ` Mathieu Dubois-Briand
2025-03-20 11:00       ` Andy Shevchenko
2025-03-18 16:26 ` [PATCH v5 06/11] gpio: regmap: Allow to allocate regmap-irq device Mathieu Dubois-Briand
2025-03-18 16:52   ` Andy Shevchenko
2025-03-20  7:55     ` Mathieu Dubois-Briand
2025-03-20 10:50       ` Andy Shevchenko
2025-03-19  7:15   ` Michael Walle
2025-03-20  8:35     ` Mathieu Dubois-Briand
2025-03-20 10:55       ` Andy Shevchenko
2025-03-25  8:03         ` Michael Walle
2025-03-25  7:50       ` Michael Walle
2025-03-26 11:00         ` Mathieu Dubois-Briand
2025-03-28  9:23           ` Michael Walle
2025-03-18 16:26 ` [PATCH v5 07/11] gpio: regmap: Allow to provide init_valid_mask callback Mathieu Dubois-Briand
2025-03-18 16:53   ` Andy Shevchenko
2025-03-20  8:48     ` Mathieu Dubois-Briand
2025-03-19  7:02   ` Michael Walle
2025-03-20  8:49     ` Mathieu Dubois-Briand
2025-03-18 16:26 ` [PATCH v5 08/11] gpio: max7360: Add MAX7360 gpio support Mathieu Dubois-Briand
2025-03-19 11:50   ` Andy Shevchenko
2025-03-25 14:46     ` Mathieu Dubois-Briand
2025-03-25 15:57       ` Andy Shevchenko
2025-03-19 14:12   ` kernel test robot
2025-03-19 22:34   ` kernel test robot
2025-03-18 16:26 ` [PATCH v5 09/11] input: keyboard: Add support for MAX7360 keypad Mathieu Dubois-Briand
2025-03-19 12:02   ` Andy Shevchenko
2025-03-25 14:57     ` Mathieu Dubois-Briand
2025-03-25 15:58       ` Andy Shevchenko
2025-03-19 15:15   ` kernel test robot
2025-03-18 16:26 ` [PATCH v5 10/11] input: misc: Add support for MAX7360 rotary Mathieu Dubois-Briand
2025-03-19 12:11   ` Andy Shevchenko
2025-03-25 15:56     ` Mathieu Dubois-Briand
2025-03-25 16:11       ` Andy Shevchenko
2025-03-19 16:31   ` kernel test robot
2025-03-20  0:29   ` kernel test robot
2025-03-18 16:26 ` [PATCH v5 11/11] MAINTAINERS: Add entry on MAX7360 driver Mathieu Dubois-Briand
2025-03-19 12:12 ` [PATCH v5 00/11] Add support for MAX7360 Andy Shevchenko

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