From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 848477081F; Thu, 4 Sep 2025 10:39:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756982353; cv=none; b=XLAHsnIbxMD5tlXXS4oItlCWPqvbBioDEWsVdl5Z3CJW6OlaWUpCar7747mzLEq74C/gGwR5QmaWNxUWTDugoSebSV2O6EK5HNNngKKwyyaALeanEccjZM4xGLHcbTR8qTD0sCBPij76VneaYyD8klRga4ttaSn98Pcu0qPUKOY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756982353; c=relaxed/simple; bh=m9KZifQbl2hwXaQWg/lWRnYIPXZP38z0b5trFu3qDSg=; h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type; b=eglRS7BHAu8MyS6T8sQlTYdvbd4abPMMTzOGJVUG0LankJ/DOgeKY31nFuoGWRAsOxbf1UbQDtyjvhFa9yQ3ff7qHSnzgEh268xywIzC7g/8I1wJialCdgAFSJn1xdAviLjWsg3y5TmhB67ID9CMIVxSo1jVpwC9gxHp+pdoWbk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Thu, 4 Sep 2025 18:34:01 +0800 Received: from twmbx02.aspeed.com (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Thu, 4 Sep 2025 18:34:01 +0800 From: Billy Tsai To: , , , , , , , , , , , , , , , Subject: [PATCH v2 0/4] Add pinctrl support for AST2700 SoC Date: Thu, 4 Sep 2025 18:33:57 +0800 Message-ID: <20250904103401.88287-1-billy_tsai@aspeedtech.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Document and add the pinctrl driver for AST2700 SoC. Changes since v1: - Update pinctrl aspeed binding files. - Update the commit message for pinctrl binding patch. Billy Tsai (4): dt-bindings: mfd: aspeed,ast2x00-scu: Support ast2700 pinctrl dt-bindings: pinctrl: aspeed: Add support for AST27xx pinctrl: aspeed: Add AST2700 pinmux support arm64: dts: add AST27xx pinctrl configuration nodes .../bindings/mfd/aspeed,ast2x00-scu.yaml | 2 + .../pinctrl/aspeed,ast2700-soc0-pinctrl.yaml | 115 + .../pinctrl/aspeed,ast2700-soc1-pinctrl.yaml | 435 +++ .../boot/dts/aspeed/aspeed-g7-pinctrl.dtsi | 1359 +++++++++ drivers/pinctrl/aspeed/Kconfig | 8 + drivers/pinctrl/aspeed/Makefile | 1 + .../pinctrl/aspeed/pinctrl-aspeed-g7-soc0.c | 503 ++++ .../pinctrl/aspeed/pinctrl-aspeed-g7-soc1.c | 2523 +++++++++++++++++ drivers/pinctrl/aspeed/pinctrl-aspeed.c | 47 + drivers/pinctrl/aspeed/pinctrl-aspeed.h | 11 +- drivers/pinctrl/aspeed/pinmux-aspeed.h | 35 +- 11 files changed, 5034 insertions(+), 5 deletions(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc0-pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc1-pinctrl.yaml create mode 100644 arch/arm64/boot/dts/aspeed/aspeed-g7-pinctrl.dtsi create mode 100644 drivers/pinctrl/aspeed/pinctrl-aspeed-g7-soc0.c create mode 100644 drivers/pinctrl/aspeed/pinctrl-aspeed-g7-soc1.c -- 2.25.1