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From: Rob Herring <robh@kernel.org>
To: Dang Huynh <dang.huynh@mainlining.org>
Cc: Manivannan Sadhasivam <mani@kernel.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	Bartosz Golaszewski <brgl@bgdev.pl>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Vinod Koul <vkoul@kernel.org>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Kees Cook <kees@kernel.org>,
	"Gustavo A. R. Silva" <gustavoars@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-unisoc@lists.infradead.org, linux-gpio@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-clk@vger.kernel.org, dmaengine@vger.kernel.org,
	linux-mmc@vger.kernel.org, linux-hardening@vger.kernel.org
Subject: Re: [PATCH 03/10] dt-bindings: dma: Add RDA IFC DMA
Date: Mon, 22 Sep 2025 13:07:23 -0500	[thread overview]
Message-ID: <20250922180723.GA547468-robh@kernel.org> (raw)
In-Reply-To: <20250919-rda8810pl-mmc-v1-3-d4f08a05ba4d@mainlining.org>

On Fri, Sep 19, 2025 at 01:48:43AM +0700, Dang Huynh wrote:
> The Intelligent Flow Controller (IFC) is a scatter/gather DMA
> controller.
> 
> Signed-off-by: Dang Huynh <dang.huynh@mainlining.org>
> ---
>  Documentation/devicetree/bindings/dma/rda,ifc.yaml | 45 ++++++++++++++++++++++
>  include/dt-bindings/dma/rda-ifc.h                  | 28 ++++++++++++++
>  2 files changed, 73 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/dma/rda,ifc.yaml b/Documentation/devicetree/bindings/dma/rda,ifc.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..323e1e87cee09cfc7b64bf44bef61e4d1e91afa5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/rda,ifc.yaml
> @@ -0,0 +1,45 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/rda,ifc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: RDA Intelligent Flow Controller (IFC)
> +
> +maintainers:
> +  - Dang Huynh <dang.huynh@mainlining.org>
> +
> +description: |

Don't need '|'.

> +  RDA IFC is a DMA controller, it only supports scatter/gather lists.
> +
> +allOf:
> +  - $ref: dma-controller.yaml#
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - rda,8810pl-ifc
> +      - const: rda,ifc
> +
> +  reg:
> +    maxItems: 1
> +
> +  "#dma-cells":
> +    const: 1
> +    description:
> +      The cell corresponding to DMA request ID
> +
> +required:
> +  - compatible
> +  - reg
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    dma-controller@f0000 {
> +      compatible = "rda,8810pl-ifc", "rda,ifc";
> +      reg = <0xf0000 0x1000>;
> +      #dma-cells = <1>;
> +    };
> diff --git a/include/dt-bindings/dma/rda-ifc.h b/include/dt-bindings/dma/rda-ifc.h
> new file mode 100644
> index 0000000000000000000000000000000000000000..af4bae0542aa71690351e2406d0945a61eff72c1
> --- /dev/null
> +++ b/include/dt-bindings/dma/rda-ifc.h
> @@ -0,0 +1,28 @@
> +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
> +
> +#ifndef __DT_BINDINGS_DMA_RDA_IFC_H__
> +#define __DT_BINDINGS_DMA_RDA_IFC_H__
> +
> +#define IFC_UART1_TX		0
> +#define IFC_UART1_RX		1
> +#define IFC_UART2_TX		2
> +#define IFC_UART2_RX		3
> +#define IFC_SPI1_TX		4
> +#define IFC_SPI1_RX		5
> +#define IFC_SPI2_TX		6
> +#define IFC_SPI2_RX		7
> +#define IFC_SPI3_TX		8
> +#define IFC_SPI3_RX		9
> +#define IFC_SDMMC1_TX		10
> +#define IFC_SDMMC1_RX		11
> +#define IFC_SDMMC2_TX		12
> +#define IFC_SDMMC2_RX		13
> +#define IFC_SDMMC3_TX		14
> +#define IFC_SDMMC3_RX		15
> +#define IFC_NFSC_TX		16
> +#define IFC_NFSC_RX		17
> +#define IFC_UART3_TX		18
> +#define IFC_UART3_RX		19
> +#define IFC_NO_REQUEST		20

These numbers are defined by the h/w (like IRQ numbers)? If so, drop the 
header. We don't do headers for h/w numbers.

Rob

  reply	other threads:[~2025-09-22 18:07 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-18 18:48 [PATCH 00/10] RDA8810PL SD/MMC support Dang Huynh via B4 Relay
2025-09-18 18:48 ` [PATCH 01/10] dt-bindings: gpio: rda: Make interrupts optional Dang Huynh via B4 Relay
2025-09-18 18:48 ` [PATCH 02/10] dt-bindings: clock: Add RDA Micro RDA8810PL clock/reset controller Dang Huynh via B4 Relay
2025-09-22 18:04   ` Rob Herring
2025-09-18 18:48 ` [PATCH 03/10] dt-bindings: dma: Add RDA IFC DMA Dang Huynh via B4 Relay
2025-09-22 18:07   ` Rob Herring [this message]
2025-09-22 18:08   ` Rob Herring
2025-09-18 18:48 ` [PATCH 04/10] dt-bindings: mmc: Add RDA SDMMC controller Dang Huynh via B4 Relay
2025-09-22 18:13   ` Rob Herring
2025-09-18 18:48 ` [PATCH 05/10] gpio: rda: Make IRQ optional Dang Huynh via B4 Relay
2025-09-18 18:48 ` [PATCH 06/10] gpio: rda: Make direction register unreadable Dang Huynh via B4 Relay
2025-09-22 14:20   ` Bartosz Golaszewski
2025-09-18 18:48 ` [PATCH 07/10] clk: Add Clock and Reset Driver for RDA Micro RDA8810PL SoC Dang Huynh via B4 Relay
2025-09-18 18:48 ` [PATCH 08/10] dmaengine: Add RDA IFC driver Dang Huynh via B4 Relay
2025-09-21  4:42   ` kernel test robot
2025-09-18 18:48 ` [PATCH 09/10] mmc: host: Add RDA Micro SD/MMC driver Dang Huynh via B4 Relay
2025-10-17 10:25   ` Ulf Hansson
2025-09-18 18:48 ` [PATCH 10/10] ARM: dts: unisoc: rda8810pl: Add SDMMC controllers Dang Huynh via B4 Relay
2025-09-22 14:17 ` [PATCH 00/10] RDA8810PL SD/MMC support Bartosz Golaszewski
2025-09-23  3:40   ` Dang Huynh
2025-09-23  7:48     ` Bartosz Golaszewski
2025-09-25  5:30       ` Dang Huynh

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